This is part of a project to construct a 4 BIT CPU from scratch. I will be starting with a simple NOR gate and building it up to a working model with ALU registers, RAM and ROM. I will be designing an op code and assembler to go with it. Progress and detail can be found on my blog here
This file contains the ALU
This is a part of a project to construct a 4 BIT CPU from scratch. I will be starting with a simple NOR gate and building it up to a working model with ALU registers, RAM and ROM. I will be designing an op code and assembler to go with it. Progress and detail can be found on my blog here
This file cotains 4 bit versions of basic logic gates.
This is part of a project to construct a 4 BIT CPU from scratch. I will be starting with a simple NOR gate and building it up to a working model with ALU registers, RAM and ROM. I will be designing an op code and assembler to go with it. Progress and detail can be found on my blog here.
This file contains the basic logic gates.
A computer made completely out of logic gates. Version 2. V1 can be found here: https://circuitverse.org/users/13948/projects/49969
Because of the limitations of the circuitverse.org simulator, and for easier use, some inbuilt components are used (like the 256-byte RAM module), but most of it is made up of OR, AND, NOT, XOR, NOR and NAND.
This project was originally made for my profile project. This is (or will be) version 2 of the 8-bit computer.
I'm using an EEPROM to replace combinational logic. The address is the decimal number in binary (or the counter). The data out is the 7-seg display (the leftmost bit is the decimal point).
Ejemplo de razonamiento combinacional.
Me casaré con una persona joven e inteligente o que tenga fortuna y no ronque.
Four bir Shift register
Computer Systems Architecture
32-bit ALU, only with AND, OR, and ADDER/SUBTRACTOR.
This is a simple digital clock with basic combinational and sequential logic circuits.
It can display seconds, minutes, and hours
Users can set time by clicking the button and using the multiplexer to choose which to change.
Also, the design for the 4bits 7segment display and 3 bits 7segment display is inside.
The circuit was made by a beginner to get some experience working with logic gates, k-maps and simulation software, there are many things that can be improved. Open for suggestions.
This demonstrate the JK-Flipflop.
J 0, K 0 => do nothing
J 1, K 0 => Set (Q = 1, Q' = 0)
J 0, K 1 => Reset (Q = 0, Q' = 1)
J 1, K 1 => Toggle Q and Q'
7 SEGMENT DISPLAY
000 - q
001 - u
010 - I
011 - N
100 - 2
101 - 9
110 - 6
111 - 5
A IN/A OUT:0=take inputted a,1=save current output and use it as a until turned back to zero
B IN/B OUT:0=take inputted b,1=save current output and use it as b until turned back to zero
ALU SELECTION:0=take gate alu as output,1=take operation alu as output
TOP 3=the systems current a
MIDDLE 3=output
BOTTOM 3=the systems current b
GATE SELECTION:00=A AND B,01=A OR B,10=NOT A/B,11=A XOR B
A/B IN FOR NOT:0=take a as input for NOT,1=take b as input for NOT
OPERATION SELECTION:0=A+B,1=A-B
SAVE A:put this alus current output in register a
SAVE B:put this alus current output in register b
OUT ALU:take output from alu
OUT A:take output from register a
OUT B:take output from register b
hello back logic world with a new project.
this time its multiplication but also contains multiple comparers