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Logic diagrams for nand2tetris part 1 (projects 1 to 6).

A simple 4 bit Johnson counter. The output bits are displayed via led's. 

The recurring pattern is 

0000

1000

1100

1110

1111

0111

0011

0001

0000

A 2-bit counter that counts from 0 to 3! :D

Set "Count" to 1 to start counting and set it to 0 to pause the counter. Set "Increment/Decrement" to 1 to count up and 0 to count down.

16-bit

Based on TD4, a 4 bit CPU.

Pre-design for Minecraft.

Synchronous overlapping sequence detector that detects the bit pattern 101 using J-K' flip flops (74LS109).

Synchronous 0-7 up counter and 7-0 down counter using J-K' flip-flops (74LS109).

Synchronous overlapping sequence detector that detects the bit patterns 010 and 1001 using J-K flip flops.

Registru de adrese.

8 bit Register

A Bidirectional shift register/Universal register circuits made using Circuitverse.....

 a 2-bit register, which has a selection bit S. If S is 0, the register will perform a parallel load. On the other hand, if S is 1, the register will perform an exchange operation. In exchange operation, the present output of the flip-flops will exchange their values, i.e., output 00 will become 00, output 11 will become 11, output 10 will become 01, and output 01 will become 10. this register is designed using J-K flip-flops and basic gates. 

Use the button inorder to jump from left to right and vice vera and try avoiding the incoming obstacles.

If you collide with it you die and can restart using the restart button given at the bottom.

Change the difficulty by reducing the timing setting of the clock and good luck :D.

Adjustable 8-bit adder which either loads values from two different registers into an 8-bit adder or sequentially adds the current output value of the adder to the value stored in the first register. Practice for RAM unit application, register creation and organization, bit splitting and compression, and sequential logic.

made by yashwardhan singh

More practice for sequential logic, implementing multiple sub-circuits to simplify the functionality of the design.

An attempt at utilizing memory storage to create some output based on information inputted into ROM block; output changes when ROM enable is toggled while the address input counter changes to change up the sequence of input bits to the registers.

More practice for memory logic. Toggle enable ROM to change up the sequence or introduce more values

ROM-instructed sequence taking data in and using half of the bits to perform memory storage and selection functions.

Atividade produzida por Pedro Emmanuel Guimarães Correia Machado e Gustavo de França Silva para a disciplina de Arquitetura de Computadores 2024.1 - UFRPE.

Simple 8x4 register file

This is an 8-bit sequential multiplier with an 8-bit output. It works by adding A to itself B number of times using an accumulator to keep track of what the value should be. Once the number of times A was added to itself is equal to B then it signals to the output and updates the data.