Searched Projects

Tags: and

project.name
0 Stars     165 Views
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User Image s

and gate

and gate
and gate simple
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This is a simple and gate
project.name
0 Stars     210 Views
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User Image Henrik Schimmel

AndGate Goal

AndGate Goal
and gate tristate bus busdriver input output constant goal not notgate
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project.name
0 Stars     190 Views
User:
User Image Abrar Battran

adn gates

adn gates
and gates
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this asmpily and gates
project.name
0 Stars     599 Views
User:
User Image Leonardo Miliani

ram rom selector

ram rom selector
and or 8-bit 74xx
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These are example circuits targeted to 8-bits homebrew computers. They are simple circuits to select between ROM and RAM memories when they share partial block of address space, i.e. if you have a big ROM chip, let's say 32K but you won't use it every single cell of it. So you can set a ROM and a RAM chip on the same address space and set your computer to select the proper one.
Let me explain. Let's say that you have 1x 32K ROM chip and 2x 32K RAM chips and you're using a Z80. The Z80 needs ROM on the first page of the address space because at reset it points to $0000 address cell. But your firmware only occupies 16/18 KB of space. So you can build this RAM/ROM selector using simple chips from the 74xx series and let the computer switches between the 2 kinds of memory. In the first one, for example, the CPU reads from ROM chip up to address $4FFF (20,479), then reads/writes from/RAM. In the second one, the CPU addresses the ROM for the first 24K of memory then switches to RAM
project.name
0 Stars     140 Views
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User Image hiteesh

hiteesh

hiteesh
and or using nand
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project.name
0 Stars     115 Views
User:
User Image lorenzo truffa giachet

nand1

nand1
and
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Basic NAND circuit element, to see how it works
project.name
0 Stars     126 Views
User:
User Image lorenzo truffa giachet

exercise1

exercise1
and
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two not circuits fed into a band
project.name
0 Stars     64 Views
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User Image chandu

chandu

chandu
and
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project.name
0 Stars     77 Views
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User Image chandu

chandu

chandu
and
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project.name
0 Stars     87 Views
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User Image Shima

first

first
and
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project.name
1 Stars     145 Views
User:
User Image Francisco Hernández Martínez

Digital Combinational Circuits

Digital Combinational Circuits
gates not and or nand nor xor xnor adder mux demux multiplexer dumultiplexer
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Digital Combinational Circuits

Gates: NOT,  AND, OR, NAND, NOR, XOR, XNOR

half adder, full adder, multiplexer, demultiplexer


project.name
0 Stars     87 Views
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User Image Lorenzo

prova

prova
and
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project.name
21 Stars     3877 Views
User:
User Image me

8 Bit CPU

8 Bit CPU
alu cpu ALU CPU computer adder add subtract subtractor shift shifter not xor and screen graphics
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This is a CPU witch is capable of executing a lot of stuff in one clock cycle, and this CPU can shift left up to 7 times and shift right up to 7 times witch means that it is possible to  multiply and divide in one clock cycle if you program a table in the program memory. it has a 32 bit instruction width and a 8 bit address. it also has 

The ALU has the following operations:

  • ADD
  • SUBTRACT
  • SHIFT_LEFT (up to 7 times per cycle 3 bit)
  • SHIFT_RIGHT (up to 7 times per cycle 3 bit)
  • XOR
  • OR
  • NOT

This Was made by miles

project.name
0 Stars     72 Views
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User Image sudaiskhan

lab dld 7

lab dld 7
and
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and gate

project.name
0 Stars     89 Views
User:
User Image rupesh kumar singh

logic gates 1

logic gates 1
not and or
View
project.name
0 Stars     109 Views
User:
User Image Shreeya Kale

dld lab 3

dld lab 3
logic gates and or xor
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project.name
0 Stars     53 Views
User:
User Image lavanya saxena

coa

coa
and not nand nor
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project.name
0 Stars     60 Views
User:
User Image Archit sen

fuller adder

fuller adder
and or exor
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project.name
0 Stars     86 Views
User:
User Image Talari Srinivasa Rohith

LOGIC GATES

LOGIC GATES
and or
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project.name
0 Stars     84 Views
User:
User Image Deepika T

laws of logic gates

laws of logic gates
and or not
View
project.name
1 Stars     106 Views
User:
User Image Nilanjan Das

All Gates

All Gates
logic gates and or not nand nor
View
project.name
0 Stars     87 Views
User:
User Image Archana Sashi

dlf

dlf
and not or
View
project.name
0 Stars     93 Views
User:
User Image Patrick F Ramsammy

AND Gate

AND Gate
and nand gate transistor
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Variation of the Gate

project.name
0 Stars     94 Views
User:
User Image Patrick F Ramsammy

Complex Gate 1

Complex Gate 1
or nor and nand gate transistor
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Deep Dive 1

project.name
0 Stars     93 Views
User:
User Image mahsa

tamrin5 Q1

tamrin5 Q1
only inventor and or
View
project.name
0 Stars     48 Views
User:
User Image mahsa

tamrin5 Q2

tamrin5 Q2
only inventor and or
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project.name
0 Stars     61 Views
User:
User Image Prema Rahuraman

Untitled

Untitled
and
View
project.name
0 Stars     90 Views
User:
User Image Patrick F Ramsammy

Test1

Test1
or nor and nand gate transistor
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Create Logic Gates and build Truth Tables

project.name
0 Stars     95 Views
User:
User Image Patrick F Ramsammy

Complex Gate 2

Complex Gate 2
or nor and nand gate transistor
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2.7 Complex Gates and Truth Tables

project.name
0 Stars     57 Views
User:
User Image Patrick F Ramsammy

Complex Gate 3

Complex Gate 3
or nor and nand gate transistor
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2.7 Complex gate with Truth Table

project.name
0 Stars     90 Views
User:
User Image Patrick F Ramsammy

Complex Gate 4

Complex Gate 4
or nor and nand gate transistor
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Complex Gates with Truth Tables

project.name
0 Stars     101 Views
User:
User Image Patrick F Ramsammy

Complex Gate 5

Complex Gate 5
or nor and nand gate transistor
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Complex Gates

project.name
0 Stars     99 Views
User:
User Image Patrick F Ramsammy

test001

test001
or nor and nand gate transistor
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test001

project.name
0 Stars     84 Views
User:
User Image Patrick F Ramsammy

Test002

Test002
or nor and nand gate transistor
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Test 002

project.name
0 Stars     96 Views
User:
User Image payal sharma

truth table of all gate

truth table of all gate
and or nand xor nor not
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project.name
0 Stars     66 Views
User:
User Image Sujan Bhowal

Logis gates

Logis gates
and or not
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project.name
0 Stars     88 Views
User:
User Image AKASH BHARDWAJ

Assignment 1

Assignment 1
and or xor nor full adder using half adder
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Assignment 1 Lab 22-01-2020

project.name
0 Stars     66 Views
User:
User Image Neeladri Pal

Basic Gates

Basic Gates
and or xor xnor
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Simple Combinational Circuit using AND, OR, XOR, XNOR

project.name
0 Stars     25 Views
User:
User Image 박성혁

g=xy' +x'z' + x'y

g=xy' +x'z' + x'y
and or not
View

.

project.name
0 Stars     61 Views
User:
User Image 박성혁

h=(x'+y')(x+y+z')

h=(x'+y')(x+y+z')
and or not
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.

project.name
0 Stars     62 Views
User:
User Image 박성혁

project4-1

project4-1
and or not
View

.

project.name
0 Stars     77 Views
User:
User Image muniqueee

COMPORTAS LÓGICAS

COMPORTAS LÓGICAS
comportas and or ou e
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Comportas lógicas anD/Ou, IFSP REGISTRO

project.name
0 Stars     68 Views
User:
User Image BT19ECE045_Jayant Rahate

Experiment 1:Verifying truth table for gates

Experiment 1:Verifying truth table for gates
or and xor nor nand xnor gates
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project.name
0 Stars     51 Views
User:
User Image Jean Yabarrena

AND 3 variaveis

AND 3 variaveis
and
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AND e propriedade associativa

project.name
0 Stars     79 Views
User:
User Image muniqueee

E - TRÊS ENTRADAS

E - TRÊS ENTRADAS
comportas and or ou e
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3 ENTRADAS aND 

project.name
0 Stars     71 Views
User:
User Image muniqueee

OU - TRÊS ENTRADAS

OU - TRÊS ENTRADAS
comportas and or ou e
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OoR - TRÊS END

project.name
0 Stars     79 Views
User:
User Image muniqueee

COMPORTAS nOT, nOR, nAND E xOR

COMPORTAS nOT, nOR, nAND E xOR
comportas and or ou e
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AAAAA

project.name
0 Stars     69 Views
User:
User Image muniqueee

3 entrada

3 entrada
and not xor nand
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aaaaaAum

project.name
0 Stars     47 Views
User:
User Image sreedevi

Verification of basic gates

Verification of basic gates
and nand or noe
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Verified the truth table of basic gates

project.name
0 Stars     55 Views
User:
User Image Salman

trial

trial
nand or and
View
project.name
0 Stars     75 Views
User:
User Image MBT19CS012 AKIL DHANESH

verifying basic circuits

verifying basic circuits
and nor not gates
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familiarizing basic gates 

project.name
0 Stars     86 Views
User:
User Image JOSHUA MBT19CS070

Verification

Verification
and nand or nor xor xnor not
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project.name
0 Stars     66 Views
User:
User Image muniqueee

BANCO COM O AGENTE

BANCO COM O AGENTE
and not xor nand
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BANCO COM O AGENTE

project.name
0 Stars     57 Views
User:
User Image muniqueee

CIRCUITO TABELA VDD 1

CIRCUITO TABELA VDD 1
and not xor nand
View

VGJNHFYTFYTHMKKt

project.name
0 Stars     66 Views
User:
User Image muniqueee

CIRCUITO DA TABELA VDD 2

CIRCUITO DA TABELA VDD 2
and not xor nand
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TTTTTTTTTTT3R2

project.name
0 Stars     80 Views
User:
User Image Aditi Agarwal

gates

gates
and nand or nor not xor xnor
View
project.name
0 Stars     62 Views
User:
User Image MUGESHKUMAR S CSEUG-2020

logic gates

logic gates
and or
View
project.name
0 Stars     57 Views
User:
User Image THIRUVEEDHI DEVESH

Study of logic gates

Study of logic gates
and or not nand nor ex-or ex-not gates
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project.name
0 Stars     59 Views
User:
User Image THIRUVEEDHI DEVESH

logic gates

logic gates
and or not nand nor ex-or ex-not gates
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project.name
0 Stars     47 Views
User:
User Image Anmol pandey

GATES

GATES
and or not nor nand xnor
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project.name
0 Stars     74 Views
User:
User Image ANSH VISHAL

basic circuit diagram

basic circuit diagram
and not or nand nor
View
project.name
0 Stars     46 Views
User:
User Image CEA1015

nor

nor
not or and
View

nothing

project.name
0 Stars     43 Views
User:
User Image pranjal sanjay kankal

DTE .1

DTE .1
and
View
project.name
0 Stars     58 Views
User:
User Image Nemanja Cukic

and

and
LAB1 and
View
project.name
0 Stars     40 Views
User:
User Image Deepshikha singh

full subtracter

full subtracter
and not xor
View
project.name
0 Stars     43 Views
User:
User Image Deepshikha singh

full adder

full adder
xor and or
View
project.name
0 Stars     38 Views
User:
User Image Deepshikha singh

half subtractor

half subtractor
xor not and
View
project.name
0 Stars     8 Views
User:
User Image JORCK ÍTALO MARINS

AND & NAND PORT

AND & NAND PORT
and nand port
View
project.name
0 Stars     43 Views
User:
User Image Deepshikha singh

3-bit carry look-ahead adder

3-bit carry look-ahead adder
xor or and
View
project.name
0 Stars     54 Views
User:
User Image Jorge Gonçalves da Silva

Exemplo de portas lógicas

Exemplo de portas lógicas
portas lógicas and nand or nor exemplos
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Exemplos do funcionamento das portas lógicas básicas.

project.name
0 Stars     55 Views
User:
User Image Muskan Chaurasia

assignment2

assignment2
and or not gates
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project.name
0 Stars     20 Views
User:
User Image Muskan Chaurasia

assignment2

assignment2
and or not gates
View
project.name
0 Stars     38 Views
User:
User Image Muskan Chaurasia

assignment3

assignment3
and or not gates
View
project.name
0 Stars     49 Views
User:
User Image it2021113

Day 1

Day 1
logic gates logic gate and not or
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project.name
0 Stars     15 Views
User:
User Image Mohana Priya J

Untitled

Untitled
and or
View
project.name
0 Stars     40 Views
User:
User Image kavipriya.J.R

full wave

full wave
xor and or
View
project.name
0 Stars     51 Views
User:
User Image kiruba.k

full and half

full and half
xor and or
View
project.name
0 Stars     50 Views
User:
User Image kiruba.k

half

half
xor and or
View
project.name
0 Stars     48 Views
User:
User Image kiruba.k

full

full
xor and or
View
project.name
0 Stars     47 Views
User:
User Image kiruba.k

multiplexer

multiplexer
and or
View
project.name
0 Stars     14 Views
User:
User Image kiruba.k

DEMULTIPLEXER

DEMULTIPLEXER
and or
View
project.name
0 Stars     7 Views
User:
User Image keerthivarman.s

full

full
xor and or
View
project.name
0 Stars     7 Views
User:
User Image keerthivarman.s

demultiplexef

demultiplexef
xor and or
View
project.name
0 Stars     44 Views
User:
User Image DHRUV KUSHWAHA

myGATES

myGATES
and or nand nor etc
View
project.name
0 Stars     39 Views
User:
User Image NITISH KUMAR

logic gate

logic gate
and or not nand nor
View

logic gate project

project.name
0 Stars     42 Views
User:
User Image 2100290130156

study of logic gates

study of logic gates
not and or nand nor xor & xnor gates
View
project.name
0 Stars     37 Views
User:
User Image Raj chavan

Logic gates

Logic gates
and or not nand
View
project.name
0 Stars     50 Views
User:
User Image Abhinav Gogawale

homework

homework
and or not nand nor xor xnor
View
project.name
0 Stars     39 Views
User:
User Image TCraft Gaming

AND and NOT

AND and NOT
and not basic general theory
View

I used CircuitVerse as an alternative to the paid circuit simulator apps. One thing I love about making circuits is starting from nothing. I limited myself to using only two gates: AND and NOT. I copied this idea from the game made by Sebastian Lague. This project starts from using the built-in AND and NOT gates.

project.name
0 Stars     19 Views
User:
User Image İsmail Ulaş Ünal

Experiment1

Experiment1
and or sop
View

first experiment

project.name
0 Stars     5 Views
User:
User Image ravi kant sharma

project1

project1
and or.not
View

some basic gates

project.name
0 Stars     5 Views
User:
User Image rekha rachana

rekha

rekha
and not or
View
project.name
1 Stars     144 Views
User:
User Image LBWNB

Clock

Clock
logic circuit digital clock 7segment and or not multiplexer combinational sequential
View

This is a simple digital clock with basic combinational and sequential logic circuits.

It can display seconds, minutes, and hours

Users can set time by clicking the button and using the multiplexer to choose which to change.

Also, the design for the 4bits 7segment display and 3 bits 7segment display is inside.

project.name
0 Stars     6 Views
User:
User Image Pawel

8 Input And Gate

8 Input And Gate
and gate 8 first
View

4, 8, and beginning of 12 AND gate IC

project.name
0 Stars     4 Views
User:
User Image Gheevas

gheevas project 1

gheevas project 1
not and or nand nor xnor gates
View
project.name
0 Stars     2 Views
User:
User Image Panwar Uday

logic gates experiment

logic gates experiment
and xnor
View
project.name
0 Stars     1 Views
User:
User Image Rajeshwari K S

experiment 1 level 1

experiment 1 level 1
not and or nand nor xor xnor
View
project.name
0 Stars     1 Views
User:
User Image Satyam Jaiswal

Satyam Jaiswal

Satyam Jaiswal
and or and not
View

implemented basic logic gates

project.name
0 Stars     2 Views
User:
User Image ARVIND RAWAT

lab 1

lab 1
and or not nand nor xor xnor
View
project.name
0 Stars     1 Views
User:
User Image utkarsh_130179

LOGIC GATES

LOGIC GATES
and or nor nand x-nor x-or not
View
project.name
0 Stars     1 Views
User:
User Image Rishikesh Mishra

7 gates Implementation

7 gates Implementation
and or nor
View

First lab of COA. 

Implementation and verification of logic gates

1.AND gate

2.OR gate

3.NOT gate

4.XOR gate

5.XNOR gate

6.NAND gate 

7.NOR gate

project.name
1 Stars     2 Views
User:
User Image shubham kumar

shubham kumar

shubham kumar
or and nor
View
project.name
0 Stars     1 Views
User:
User Image aseem hasan

Untitled

Untitled
and
View
project.name
0 Stars     2 Views
User:
User Image Dhruv Kaushik

team baka

team baka
and or not gate
View
project.name
0 Stars     1 Views
User:
User Image Paul Taylor

Untitled

Untitled
or not and nand
View

NAND gate only version for other gates

project.name
0 Stars     2 Views
User:
User Image Ajinkya More

full_substractor

full_substractor
exor not and led input output
View

A Full Subtractor is a combinational logic circuit that is designed to perform the subtraction of two binary numbers. It is considered "full" because it not only considers the subtraction of two binary inputs but also accounts for a borrow input from the previous stage. In other words, it can subtract three binary bits - minuend, subtrahend, and borrow - to produce the difference and a borrow output.

project.name
0 Stars     3 Views
User:
User Image Edward Pickering-Symes

LetsCook

LetsCook
python cooking boolean and not recipe
View

Logic circuit for turning flour, milk, oil, yeast and/or eggs into a variety of different foods.

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