Dans ce projet, je construit quelques circuits logiques séquentiels:
A J-K flip-flop is nothing more than an S-R flip-flop with an added layer of feedback. This feedback selectively enables one of the two set/reset inputs so that they cannot both carry an active signal to the multivibrator circuit, thus eliminating the invalid condition.
Flip Flop Using NAND GATE
SR, JK, D, T Flip Flop
rs and jk flip flop using nand gate.