CircuitVerse - JK FlipFlop NAND Gates (Rising edge)

JK FlipFlop NAND Gates (Rising edge)

0 Stars 77 Views

FlipFlop JK positive logic NAND Gates JK FlipFlop sequential logic

Author: SapereCircuit

Project access type: Public

Description:

This demonstrate the JK-Flipflop.

J 0, K 0 => do nothing
J 1, K 0 => Set (Q = 1, Q' = 0)
J 0, K 1 => Reset (Q = 0, Q' = 1)
J 1, K 1 => Toggle Q and Q'

Created: Dec 26, 2022

Updated: Aug 27, 2023

You must login before you can post a comment.