Logic diagrams for nand2tetris part 1 (projects 1 to 6).
This is part of a project to construct a 4 BIT CPU from scratch. I will be starting with a simple NOR gate and building it up to a working model with ALU registers, RAM and ROM. I will be designing an op code and assembler to go with it. Progress and detail can be found on my blog here
This file contains the ALU
This is a CPU witch is capable of executing a lot of stuff in one clock cycle, and this CPU can shift left up to 7 times and shift right up to 7 times witch means that it is possible to multiply and divide in one clock cycle if you program a table in the program memory. it has a 32 bit instruction width and a 8 bit address. it also has
The ALU has the following operations:
This Was made by miles