Searched Projects

Tags: lab

project.name
0 Stars     74 Views
User:
User Image Carolyn Sanderlin

MultiplexLab

MultiplexLab
lab
View
project.name
0 Stars     45 Views
User:
User Image Ethan Hill

Lab8

Lab8
lab
View
project.name
0 Stars     46 Views
User:
User Image Mohammad Wafie

1-Bit Full Adder Part 1

1-Bit Full Adder Part 1
lab part1
View
project.name
0 Stars     50 Views
User:
User Image Muhammad Hamza Sadaqat

Lab 004

Lab 004
lab
View
project.name
0 Stars     44 Views
User:
User Image Aman Jhagrolia

adder

adder
CA lab lab1
View
project.name
0 Stars     46 Views
User:
User Image Nicolás Cifuentes Barriga

Laboratorio3

Laboratorio3
lab digitales
View
project.name
0 Stars     46 Views
User:
User Image Samia

lab mid

lab mid
lab
View
project.name
0 Stars     72 Views
User:
User Image Aniket Ghosh

mux

mux
mux co lab
View

4:1 8:1 mux expansion

project.name
0 Stars     49 Views
User:
User Image Jacob Adio

preliminary lab

preliminary lab
lab
View

preliminary lab

project.name
0 Stars     40 Views
User:
User Image Felipe Marin

Marin_Felipe_Lab00

Marin_Felipe_Lab00
lab
View
project.name
0 Stars     35 Views
User:
User Image Nallamothu Vinay Kumar

DCMP

DCMP
lab
View
project.name
0 Stars     41 Views
User:
User Image Noora Ahmed

Lab2

Lab2
lab
View

ex

project.name
0 Stars     42 Views
User:
User Image SHAIK LATHIFA : ECE DEPT

Half and Full Subtractor

Half and Full Subtractor
lab
View
project.name
0 Stars     33 Views
User:
User Image Md. Kamal Uddin Sabbir

xy

xy
lab
View
project.name
0 Stars     74 Views
User:
User Image ismail

lab 1

lab 1
lab 1
View
project.name
0 Stars     31 Views
User:
User Image MUHAMMAD AMIR NAQIUDDIN

lab2

lab2
lab
View
project.name
0 Stars     40 Views
User:
User Image Raghad Farhud

lab Q/A

lab Q/A
lab digital logic design
View
project.name
0 Stars     29 Views
User:
User Image Stephen Earlie

Untitled

Untitled
lab
View
project.name
0 Stars     17 Views
User:
User Image Shengwei Huang

lab1

lab1
lab
View
project.name
0 Stars     12 Views
User:
User Image doğaç şahin

lab1

lab1
lab
View
project.name
0 Stars     22 Views
User:
User Image BlackRaven37

DLD lab 1 & 2

DLD lab 1 & 2
DLD 2023 lab exam
View

none

project.name
0 Stars     21 Views
User:
User Image Yohannes Wondimu

Lab 2 - Adder

Lab 2 - Adder
adder lab lab2
View
project.name
1 Stars     15 Views
User:
User Image MayraGarciaG

Practica 5

Practica 5
circuitosDigitales lab
View
project.name
0 Stars     10 Views
User:
User Image MayraGarciaG

Practica 4

Practica 4
circuitosDigitales lab
View
project.name
0 Stars     12 Views
User:
User Image MayraGarciaG

PRACTICA 6

PRACTICA 6
circuitosDigitales lab
View
project.name
0 Stars     12 Views
User:
User Image MayraGarciaG

practica 7

practica 7
circuitosDigitales lab
View
project.name
0 Stars     9 Views
User:
User Image jashwanthg

digital design

digital design
lab
View
project.name
0 Stars     10 Views
User:
User Image Karthik

Karthik digital dsign

Karthik digital dsign
lab
View
project.name
0 Stars     11 Views
User:
User Image Karthik

karthik project 2

karthik project 2
lab
View
project.name
0 Stars     15 Views
User:
User Image Samridhi

circuis

circuis
lab 2
View
project.name
0 Stars     10 Views
User:
User Image sterie mioara

Lab1 sterie mioara

Lab1 sterie mioara
lab 1
View
project.name
0 Stars     11 Views
User:
User Image sterie mioara

tema2steriemioara

tema2steriemioara
lab 2
View
project.name
0 Stars     9 Views
User:
User Image Daniel Jordano Gutierrez Janampa

Untitled

Untitled
lab
View
project.name
0 Stars     11 Views
User:
User Image Witold Zawada

Lab1

Lab1
debile lab
View

Zadanie:
Zaprojektować układ kombinacyjny realizujący podaną funkcję z użyciem minimalnej liczby elementów. W układach wielowyjściowych wyodrębnić jak największa część wspólną.

Funkcja:
X=∏(17,18,19,24,27,44,45,61,62)∏ø(16,25,26,38,39,47,60,63)
Uwagi:
Na bramkach NOR

project.name
0 Stars     6 Views
User:
User Image plinszets

lab3

lab3
cpe222 lab
View

learning 7 segment (nand gate)

project.name
0 Stars     5 Views
User:
User Image David Dulce

logica_lab1

logica_lab1
logic lab
View

Circuito sin reducir del primer laboratorio de lógica digital

project.name
0 Stars     6 Views
User:
User Image Nicolas Imhof

Digital lab

Digital lab
lab 4-bit counter
View

Lab 1’:Design a 4-bit counter 

The counter has two control inputs and 4-bit output, indicating the count. The counter should only count from 0 to 9. If the counter is 9, it should go back to 0

Follow us on:

Facebook Logo Twitter Logo Linkedin Logo Youtube Logo Github Logo
Simulator
Learn
Blog
Examples
Log in
Documentation
Contribute
Teachers
About
Api
FAQ
Incubated From:

Copyright © 2024 CircuitVerse, All rights reserved.