Searched Projects

Tags: NAND

project.name
0 Stars     154 Views
User:

LED_NAND

Here we have used NAND gate as the circuit intermediate. On one side of NAND gate there is LED and other side there are two input devices attached to it which give different input and as a result LED gives us the output.

project.name
0 Stars     116 Views
User:

AND_NAND

Here, we have used NAND gate to derive the AND gate using 2 NAND gates.

project.name
0 Stars     98 Views
User:

OR_NAND

Here, we have used 3 NAND gates to derive OR gate.

project.name
0 Stars     114 Views

All possible functions of one boolean argument using NAND gate

https://docs.google.com/spreadsheets/d/1_cedjiihoQCkkzHTgJ-hSHLCUhRXHaPbhZT1f0CxDoc

project.name
0 Stars     121 Views

All possible functions with two arguments built using NAND gates

Part 1: https://youtu.be/doHKPRt7oVo
Part 2: https://youtu.be/Wf4_BI0Ni3c
Functions: https://docs.google.com/spreadsheets/d/1tTTJzkWW9U1_2Y7GhNJUYV1NzlCdw87K10sv91FuykE

project.name
0 Stars     83 Views

16 functions with two arguments built using 14 NAND gates

https://youtu.be/gTFkdSTl7Ug
Functions: https://docs.google.com/spreadsheets/d/1yaYC6GCLoEN9eDn7LEegvsO5ePaBQ6bwXCmH-4zQHk0

project.name
0 Stars     89 Views

Simple 16 functions with two arguments built using 14 NAND gates

https://youtu.be/yyHd2UKErkA
Functions: https://docs.google.com/spreadsheets/d/1GiAXnaTXAUcgFKmCjEzwUsALLOG7dnfaSoeXQnN0Nm0

project.name
0 Stars     76 Views
User:

HalfAdder_NAND

Here, we have used all the NAND gates to construct Half Adder using only two inputs.

project.name
0 Stars     47 Views

57838_πλήρης αθροιστής μιας θέσης με πύλες NAND,XOR


project.name
0 Stars     55 Views

57838_ημιαθροιστης με πύλες XOR,NAND,NOT


project.name
0 Stars     45 Views
User:

COMPUERTAS


project.name
0 Stars     352 Views
User:

4-Bit 7-Segment Display using only NAND


project.name
0 Stars     53 Views
User:

Decoder


project.name
0 Stars     105 Views

XNOR USING NAND GATES


project.name
0 Stars     54 Views

Experiment-1

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR


project.name
0 Stars     48 Views

project.name
0 Stars     45 Views

project.name
0 Stars     48 Views
User:

NAND Gates


project.name
0 Stars     52 Views
User:

Basic gates from NAND gate


project.name
0 Stars     37 Views

AND


project.name
0 Stars     44 Views
User:

Basic Logic Gates

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,


project.name
0 Stars     55 Views
User:

Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic Gates


Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)



project.name
0 Stars     48 Views

project.name
0 Stars     39 Views

2061008 m.anish q4

q4


project.name
0 Stars     39 Views

2047024_xor_using_nand


project.name
0 Stars     52 Views
User:

FAMILIRIZATION OF LOGIC GATES


project.name
0 Stars     41 Views

FAMILIARISATION OF CIRCUITS

Result: Familiarisation with logic gates through virtual lab successfully completed.


project.name
0 Stars     55 Views

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.


project.name
0 Stars     48 Views

HALF AND FULL ADDER

Successfully completed half and full adder using gates and universal gates.


project.name
0 Stars     53 Views

Flipflops


project.name
0 Stars     45 Views

NAND GATE and derivatives


project.name
0 Stars     55 Views
User:

ALU_ROrg2021

Rechnerorganisation TU Berlin WS2021


project.name
0 Stars     41 Views

lOGIC GATES


project.name
0 Stars     45 Views

project.name
0 Stars     47 Views
User:

project.name
0 Stars     58 Views
User:

From NAND to Tetris Ch.1


project.name
0 Stars     31 Views

NAND Example

Example NAND gate


project.name
0 Stars     32 Views

Verify the univarsality of NAND & NOR gates

Experiment 1


project.name
0 Stars     39 Views

Universal Gate


project.name
0 Stars     50 Views

Experiment-1(Basic Gates)

Introduction to logic gates and it's verification with truth table.


project.name
0 Stars     61 Views

project.name
0 Stars     41 Views

EXPERIMENT 1 A


project.name
0 Stars     11 Views

Gates


project.name
0 Stars     11 Views

GATE


project.name
0 Stars     13 Views

Gates


project.name
0 Stars     26 Views

project.name
0 Stars     27 Views

project.name
0 Stars     41 Views

RS latch

RS latch using NAND and NOR gates


project.name
0 Stars     21 Views
User:

Gates

Puertas Logicas


project.name
0 Stars     40 Views

Verifying basic Gates

Verifying the truth tables of Basic and Universal Gates


project.name
0 Stars     32 Views

Verifying Basic Gates


project.name
0 Stars     38 Views

Verifying Basic Gates

Verification of basic gates


project.name
0 Stars     35 Views

Verifying basic gates

Representation of 7 logic gates.


project.name
0 Stars     26 Views

LOGIC GATES


project.name
0 Stars     22 Views
User:

Verification of gates

verification of truth table


project.name
0 Stars     23 Views
User:

Al gates verify


project.name
0 Stars     27 Views
User:

project.name
0 Stars     39 Views
User:

Experiment 1


project.name
0 Stars     34 Views

Basic Logic Gates

Basic circuits of all gates


project.name
0 Stars     37 Views

Basic Logic Gates


project.name
0 Stars     23 Views

project.name
0 Stars     6 Views
User:

2141039_q4

2141039 Sourav Kumar Question No.4


project.name
0 Stars     18 Views

project.name
0 Stars     36 Views

project.name
0 Stars     36 Views

project.name
0 Stars     37 Views

project.name
0 Stars     17 Views
User:

SREELAKSHMI M


project.name
1 Stars     19 Views
User:

Sreelakshmi M


project.name
1 Stars     13 Views
User:

project.name
0 Stars     17 Views
User:

project.name
0 Stars     15 Views
User:

project.name
0 Stars     16 Views
User:

project.name
0 Stars     18 Views

project.name
0 Stars     25 Views

project.name
0 Stars     20 Views
User:

Logic Gates


project.name
0 Stars     34 Views
User:

CIRCUIT DIAGRAM


project.name
0 Stars     21 Views
User:

project.name
0 Stars     56 Views
User:

DL_CO_Full_Subtractor_NAND_2147033

Full Subtractor using NAND Gates


project.name
0 Stars     34 Views

OR,AND,NOT,NOR,NAND,XOR,XNOR


project.name
0 Stars     22 Views

SR Latch


project.name
0 Stars     25 Views

project.name
0 Stars     18 Views
User:

Familiarization of gates


project.name
0 Stars     20 Views
User:

NOR GATE

NOR GATE AS UNIVERSAL GATE


project.name
0 Stars     35 Views
User:

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND


project.name
0 Stars     30 Views
User:

Implementation of SR FLIP-FLOP using SR-LATCH

Implementation of SR LATCH using NAND Gate


project.name
0 Stars     30 Views
User:

Implementation of D FLIP-FLOP Using SR-Latch and NAND Gates


project.name
0 Stars     21 Views
User:

Implementation of JK FLIP FLOP


project.name
0 Stars     24 Views
User:

Implementation of D FLIP-FLOP using JK FLIP-FLOP


project.name
0 Stars     27 Views
User:

Implementation of a T FLIP-FLOP using JK FLIP FLOP


project.name
0 Stars     24 Views

Universal Gates

Working properly



project.name
0 Stars     17 Views

Logic gates

These are logic gates


project.name
0 Stars     10 Views
User:

C1

function F(D, C, B, A)= Σ(0, 1, 4, 5, 7, 8, 9, 12, 14, 15) realised only with NANDs


project.name
0 Stars     10 Views
User:

Lab 1


project.name
0 Stars     4 Views

NAND Implementation

Implemented NAND


project.name
0 Stars     1 Views

Gate1


project.name
0 Stars     14 Views

Exemplos de portas lógicas


project.name
0 Stars     12 Views
User:

Soal 1. NAND menjadi AND


project.name
0 Stars     7 Views
User:

Soal 1. NAND menjadi NOT


project.name
0 Stars     12 Views

NAND and NOR as Other gates


project.name
0 Stars     27 Views

Construcción de compuertas fundamentales y derivadas mediante compuertas NAND.


project.name
0 Stars     11 Views

NOT, AND y OR a NAND

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

  • Natalia Andrea Álvarez Hoyos
  • Jean Carlo Montoya Castro
  • Sebastián Valencia Zapata
  • Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.


project.name
0 Stars     6 Views

TP Portes logiques ALU - PB


project.name
0 Stars     12 Views

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES


project.name
1 Stars     4 Views

Basic gates using universal gates


project.name
0 Stars     3 Views

Lab1


project.name
0 Stars     9 Views

3-input Logic gates


project.name
0 Stars     3 Views

Basic Logic Gates

Basic Logic Gates Simulating online


project.name
0 Stars     3 Views
User:

The main gates


project.name
0 Stars     3 Views

LOGIC GATES

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.


project.name
0 Stars     8 Views

Logic Gates


project.name
0 Stars     4 Views

NAND Gate


project.name
0 Stars     12 Views

NAND GATE-Universal Gate


project.name
0 Stars     3 Views

SEEM-1 PRATICAL


project.name
0 Stars     4 Views

OR Gate Using NAND


project.name
0 Stars     4 Views

AND Using NAND


project.name
0 Stars     3 Views

NOT Using NAND


project.name
0 Stars     3 Views

NAND gate


project.name
0 Stars     10 Views

JK FlipFlop NAND Gates (Rising edge)

This demonstrate the JK-Flipflop.

J 0, K 0 => do nothing
J 1, K 0 => Set (Q = 1, Q' = 0)
J 0, K 1 => Reset (Q = 0, Q' = 1)
J 1, K 1 => Toggle Q and Q'



project.name
0 Stars     2 Views

ASC_04_NAND

Parte componenta a proiectului ASC: NAND.


project.name
0 Stars     7 Views
User:

Shivam Kumar /Roll no.51/Section A.


project.name
0 Stars     2 Views
User:

And Gate by NAND GATE


project.name
0 Stars     3 Views
User:

OR Gate Using Nand Gate


project.name
0 Stars     1 Views
User:

NOT GATE Using NAND GATE


project.name
0 Stars     11 Views
User:

(B'+A'C)' Using Nand Gate And Nor Gate


project.name
0 Stars     9 Views
User:

w’x’y + y’z + (x+z’)


project.name
0 Stars     1 Views

Fire place control Pt 2


project.name
0 Stars     2 Views

Simulación de Circuitos Digitales

Obtener la expresión de F que permita implementarla con el menor número de puertas posible, de cualquier tipo, y representar el circuito equivalente.

F(A, B, C, D) = AB + BC + CD


project.name
0 Stars     3 Views

Simulación de Circuitos Digitales Ejercicio 2

Expresión simplificada de la función F(A, B, C, D, E)


project.name
0 Stars     3 Views
User:

OR Gate with NAND

Example of OR gate built with only NAND gates.


project.name
0 Stars     1 Views

Universal Gates using NAND Gates


project.name
0 Stars     2 Views
User:

LessEqualsGreater-NAND

This is a 1-bit-generator comparing two 1-bit values if they are less, equals or greater the other value. Only using NAND-Gates.


project.name
0 Stars     3 Views
User:

external practical


project.name
0 Stars     5 Views

Full Adder using BOTH NAND and NOR gates.

Full Adder using BOTH NAND and NOR gates.


project.name
0 Stars     12 Views

8-bit Arithmetic Logic Unit (2

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).


project.name
0 Stars     7 Views

8-bit Arithmetic Logic Unit (ALU)

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction uses the built in component.


project.name
0 Stars     2 Views

Gerbang Logika NAND

Gerbang Logika NAND ini adalah gabungan dari gerbang AND dan gerbang NOT. Karena itu output yang dihasilkan dari gerbang NAND ini adalah kebalikan dari gerbang AND.

Berikut adalah simulasi gerbang logika dasar NAND :