Searched Projects

Tags: NAND

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LED_NAND

Here we have used NAND gate as the circuit intermediate. On one side of NAND gate there is LED and other side there are two input devices attached to it which give different input and as a result LED gives us the output.

project.name
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AND_NAND

Here, we have used NAND gate to derive the AND gate using 2 NAND gates.

project.name
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OR_NAND

Here, we have used 3 NAND gates to derive OR gate.

project.name
0 Stars     91 Views

All possible functions of one boolean argument using NAND gate

https://docs.google.com/spreadsheets/d/1_cedjiihoQCkkzHTgJ-hSHLCUhRXHaPbhZT1f0CxDoc

project.name
0 Stars     102 Views

All possible functions with two arguments built using NAND gates

Part 1: https://youtu.be/doHKPRt7oVo
Part 2: https://youtu.be/Wf4_BI0Ni3c
Functions: https://docs.google.com/spreadsheets/d/1tTTJzkWW9U1_2Y7GhNJUYV1NzlCdw87K10sv91FuykE

project.name
0 Stars     64 Views

16 functions with two arguments built using 14 NAND gates

https://youtu.be/gTFkdSTl7Ug
Functions: https://docs.google.com/spreadsheets/d/1yaYC6GCLoEN9eDn7LEegvsO5ePaBQ6bwXCmH-4zQHk0

project.name
0 Stars     65 Views

Simple 16 functions with two arguments built using 14 NAND gates

https://youtu.be/yyHd2UKErkA
Functions: https://docs.google.com/spreadsheets/d/1GiAXnaTXAUcgFKmCjEzwUsALLOG7dnfaSoeXQnN0Nm0

project.name
0 Stars     55 Views
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HalfAdder_NAND

Here, we have used all the NAND gates to construct Half Adder using only two inputs.

project.name
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57838_πλήρης αθροιστής μιας θέσης με πύλες NAND,XOR


project.name
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57838_ημιαθροιστης με πύλες XOR,NAND,NOT


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COMPUERTAS


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4-Bit 7-Segment Display using only NAND


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Decoder


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0 Stars     36 Views

XNOR USING NAND GATES


project.name
0 Stars     29 Views

Experiment-1

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR


project.name
0 Stars     22 Views

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NAND Gates


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Basic gates from NAND gate


project.name
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AND


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Basic Logic Gates

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,


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Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic Gates


Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)



project.name
0 Stars     20 Views

project.name
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2061008 m.anish q4

q4


project.name
0 Stars     20 Views

2047024_xor_using_nand


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0 Stars     26 Views
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FAMILIRIZATION OF LOGIC GATES


project.name
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FAMILIARISATION OF CIRCUITS

Result: Familiarisation with logic gates through virtual lab successfully completed.


project.name
0 Stars     30 Views

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.


project.name
0 Stars     24 Views

HALF AND FULL ADDER

Successfully completed half and full adder using gates and universal gates.


project.name
0 Stars     22 Views

Flipflops


project.name
0 Stars     24 Views

NAND GATE and derivatives


project.name
0 Stars     40 Views
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ALU_ROrg2021

Rechnerorganisation TU Berlin WS2021


project.name
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lOGIC GATES


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project.name
0 Stars     28 Views
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From NAND to Tetris Ch.1


project.name
0 Stars     21 Views

NAND Example

Example NAND gate


project.name
0 Stars     16 Views

Verify the univarsality of NAND & NOR gates

Experiment 1


project.name
0 Stars     17 Views

Universal Gate


project.name
0 Stars     23 Views

Experiment-1(Basic Gates)

Introduction to logic gates and it's verification with truth table.


project.name
0 Stars     27 Views

project.name
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EXPERIMENT 1 A


project.name
0 Stars     10 Views

Gates


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0 Stars     10 Views

GATE


project.name
0 Stars     12 Views

Gates


project.name
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project.name
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project.name
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RS latch

RS latch using NAND and NOR gates


project.name
0 Stars     8 Views
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Gates

Puertas Logicas


project.name
0 Stars     17 Views

Verifying basic Gates

Verifying the truth tables of Basic and Universal Gates


project.name
0 Stars     13 Views

Verifying Basic Gates


project.name
0 Stars     15 Views

Verifying Basic Gates

Verification of basic gates


project.name
0 Stars     13 Views

Verifying basic gates

Representation of 7 logic gates.


project.name
0 Stars     11 Views

LOGIC GATES


project.name
0 Stars     9 Views
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Verification of gates

verification of truth table


project.name
0 Stars     9 Views
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Al gates verify


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0 Stars     9 Views
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project.name
0 Stars     13 Views
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Experiment 1


project.name
0 Stars     12 Views

Basic Logic Gates

Basic circuits of all gates


project.name
0 Stars     13 Views

Basic Logic Gates


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0 Stars     8 Views

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0 Stars     5 Views
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2141039_q4

2141039 Sourav Kumar Question No.4


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0 Stars     9 Views

project.name
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project.name
0 Stars     9 Views
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SREELAKSHMI M


project.name
1 Stars     10 Views
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Sreelakshmi M


project.name
1 Stars     8 Views
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project.name
0 Stars     9 Views
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project.name
0 Stars     8 Views
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project.name
0 Stars     8 Views
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project.name
0 Stars     7 Views

project.name
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NAND to AND


project.name
0 Stars     6 Views

NAND to NOT


project.name
0 Stars     8 Views

NAND to OR


project.name
0 Stars     8 Views

NAND to NOR


project.name
0 Stars     8 Views

NAND to XOR


project.name
0 Stars     6 Views

NAND to XNOR


project.name
0 Stars     7 Views

NOR to NAND


project.name
0 Stars     6 Views

project.name
0 Stars     8 Views
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Logic Gates


project.name
0 Stars     9 Views
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CIRCUIT DIAGRAM


project.name
0 Stars     6 Views
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project.name
0 Stars     34 Views
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DL_CO_Full_Subtractor_NAND_2147033

Full Subtractor using NAND Gates


project.name
0 Stars     12 Views

OR,AND,NOT,NOR,NAND,XOR,XNOR


project.name
0 Stars     5 Views

SR Latch


project.name
0 Stars     5 Views

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Familiarization of gates


project.name
0 Stars     4 Views
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NOR GATE

NOR GATE AS UNIVERSAL GATE


project.name
0 Stars     10 Views
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Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND


project.name
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Implementation of SR FLIP-FLOP using SR-LATCH

Implementation of SR LATCH using NAND Gate


project.name
0 Stars     7 Views
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Implementation of D FLIP-FLOP Using SR-Latch and NAND Gates


project.name
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Implementation of JK FLIP FLOP


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Implementation of D FLIP-FLOP using JK FLIP-FLOP


project.name
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Implementation of a T FLIP-FLOP using JK FLIP FLOP


project.name
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Universal Gates

Working properly



project.name
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Logic gates

These are logic gates


project.name
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C1

function F(D, C, B, A)= Σ(0, 1, 4, 5, 7, 8, 9, 12, 14, 15) realised only with NANDs


project.name
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Lab 1


project.name
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NAND Implementation

Implemented NAND


project.name
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Gate1


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Exemplos de portas lógicas


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Soal 1. NAND menjadi AND


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Soal 1. NAND menjadi NOT


project.name
0 Stars     1 Views

NAND and NOR as Other gates


project.name
0 Stars     8 Views

Construcción de compuertas fundamentales y derivadas mediante compuertas NAND.