Searched Projects

Tags: NAND

project.name
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LED_NAND

LED_NAND
Here we have used NAND gate as the circuit intermediate. On one side of NAND gate there is LED and other side there are two input devices attached to it which give different input and as a result LED gives us the output.

project.name
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AND_NAND

AND_NAND
Here, we have used NAND gate to derive the AND gate using 2 NAND gates.

project.name
0 Stars     116 Views
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OR_NAND

OR_NAND
Here, we have used 3 NAND gates to derive OR gate.

project.name
0 Stars     133 Views

All possible functions of one boolean argument using NAND gate

All possible functions of one boolean argument using NAND gate
https://docs.google.com/spreadsheets/d/1_cedjiihoQCkkzHTgJ-hSHLCUhRXHaPbhZT1f0CxDoc

project.name
0 Stars     133 Views

All possible functions with two arguments built using NAND gates

All possible functions with two arguments built using NAND gates
Part 1: https://youtu.be/doHKPRt7oVo
Part 2: https://youtu.be/Wf4_BI0Ni3c
Functions: https://docs.google.com/spreadsheets/d/1tTTJzkWW9U1_2Y7GhNJUYV1NzlCdw87K10sv91FuykE

project.name
0 Stars     94 Views

16 functions with two arguments built using 14 NAND gates

16 functions with two arguments built using 14 NAND gates
https://youtu.be/gTFkdSTl7Ug
Functions: https://docs.google.com/spreadsheets/d/1yaYC6GCLoEN9eDn7LEegvsO5ePaBQ6bwXCmH-4zQHk0

project.name
0 Stars     104 Views

Simple 16 functions with two arguments built using 14 NAND gates

Simple 16 functions with two arguments built using 14 NAND gates

https://youtu.be/yyHd2UKErkA

Functions: https://docs.google.com/spreadsheets/d/1GiAXnaTXAUcgFKmCjEzwUsALLOG7dnfaSoeXQnN0Nm0


project.name
0 Stars     93 Views
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HalfAdder_NAND

HalfAdder_NAND
Here, we have used all the NAND gates to construct Half Adder using only two inputs.

project.name
0 Stars     60 Views

57838_πλήρης αθροιστής μιας θέσης με πύλες NAND,XOR

57838_πλήρης αθροιστής μιας θέσης με πύλες NAND,XOR

project.name
0 Stars     72 Views

57838_ημιαθροιστης με πύλες XOR,NAND,NOT

57838_ημιαθροιστης με πύλες XOR,NAND,NOT

project.name
0 Stars     55 Views
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COMPUERTAS

COMPUERTAS

project.name
0 Stars     470 Views
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7 Segment Decoder (Only NAND)

7 Segment Decoder (Only NAND)

4-Bit 7-Segment Display using only NAND


project.name
0 Stars     101 Views
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Decoder

Decoder

project.name
0 Stars     147 Views

XNOR USING NAND GATES

XNOR USING NAND GATES

project.name
0 Stars     78 Views

Experiment-1

Experiment-1

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR


project.name
0 Stars     65 Views

GATES

GATES

project.name
0 Stars     57 Views

logic gates

logic gates

project.name
0 Stars     63 Views
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NAND Gates

NAND Gates

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Basic gates from NAND gate

Basic gates from NAND gate

project.name
0 Stars     49 Views

AND

AND

project.name
0 Stars     60 Views
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Basic Logic Gates

Basic Logic Gates

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,


project.name
0 Stars     65 Views
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Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic Gates


Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)



project.name
0 Stars     63 Views

aMISH Q1

aMISH Q1

project.name
0 Stars     51 Views

2061008 m.anish q4

2061008 m.anish q4

q4


project.name
0 Stars     48 Views

2047024_xor_using_nand

2047024_xor_using_nand

project.name
0 Stars     64 Views
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FAMILIRIZATION OF LOGIC GATES

FAMILIRIZATION OF LOGIC GATES

project.name
0 Stars     56 Views

FAMILIARISATION OF CIRCUITS

FAMILIARISATION OF CIRCUITS

Result: Familiarisation with logic gates through virtual lab successfully completed.


project.name
0 Stars     69 Views

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.


project.name
0 Stars     65 Views

HALF AND FULL ADDER

HALF AND FULL ADDER

Successfully completed half and full adder using gates and universal gates.


project.name
0 Stars     113 Views

Flip-Flops

Flip-Flops

Flipflops


project.name
0 Stars     62 Views

NAND GATE and derivatives

NAND GATE and derivatives

project.name
0 Stars     69 Views
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ALU_ROrg2021

ALU_ROrg2021

Rechnerorganisation TU Berlin WS2021


project.name
0 Stars     58 Views

lOGIC GATES

lOGIC GATES

project.name
0 Stars     58 Views

GATES

GATES

project.name
0 Stars     58 Views
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Logic GATES

Logic GATES

project.name
0 Stars     73 Views
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From NAND to Tetris Ch.1

From NAND to Tetris Ch.1

project.name
0 Stars     44 Views

NAND Example

NAND Example

Example NAND gate


project.name
0 Stars     41 Views

Verify the univarsality of NAND & NOR gates

Verify the univarsality of NAND & NOR gates

Experiment 1


project.name
0 Stars     48 Views

Universal Gate

Universal Gate

project.name
0 Stars     66 Views

Experiment-1(Basic Gates)

Experiment-1(Basic Gates)

Introduction to logic gates and it's verification with truth table.


project.name
0 Stars     83 Views

project.name
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EXPERIMENT 1 A

EXPERIMENT 1 A

project.name
0 Stars     17 Views

Gates

Gates

project.name
0 Stars     16 Views

GATE

GATE

project.name
0 Stars     22 Views

Gates

Gates

project.name
0 Stars     35 Views

BCD NAND

BCD NAND

project.name
0 Stars     37 Views

BCH NAND

BCH NAND

project.name
0 Stars     53 Views

RS latch

RS latch

RS latch using NAND and NOR gates


project.name
0 Stars     28 Views
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Gates

Gates

Puertas Logicas


project.name
0 Stars     51 Views

Verifying basic Gates

Verifying basic Gates

Verifying the truth tables of Basic and Universal Gates


project.name
0 Stars     44 Views

Verifying Basic Gates

Verifying Basic Gates

project.name
0 Stars     51 Views

Verifying Basic Gates

Verifying Basic Gates

Verification of basic gates


project.name
0 Stars     46 Views

Verifying basic gates

Verifying basic gates

Representation of 7 logic gates.


project.name
0 Stars     35 Views

LOGIC GATES

LOGIC GATES

project.name
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Verification of gates

Verification of gates

verification of truth table


project.name
0 Stars     34 Views
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Al gates verify

Al gates verify

project.name
0 Stars     37 Views
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logic gates

logic gates

project.name
0 Stars     54 Views
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Experiment 1

Experiment 1


project.name
0 Stars     48 Views

Basic Logic Gates

Basic Logic Gates

Basic circuits of all gates


project.name
0 Stars     48 Views

Basic Logic Gates

Basic Logic Gates

project.name
0 Stars     34 Views

project.name
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2141039_q4

2141039_q4

2141039 Sourav Kumar Question No.4


project.name
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EXPERIMENT:1

EXPERIMENT:1

project.name
0 Stars     50 Views

LOGIC

LOGIC

project.name
0 Stars     48 Views

LOGIC

LOGIC

project.name
0 Stars     47 Views

experiment 1

experiment 1

project.name
0 Stars     27 Views
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EXPERIMENT 1

EXPERIMENT 1

SREELAKSHMI M


project.name
1 Stars     27 Views
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EXPERIMENT 1

EXPERIMENT 1

Sreelakshmi M


project.name
1 Stars     22 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     25 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     23 Views
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EXPT NO 2

EXPT NO 2

project.name
0 Stars     29 Views

first

first

project.name
0 Stars     37 Views

Exp1

Exp1

project.name
0 Stars     30 Views
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Logic Gates

Logic Gates

project.name
0 Stars     50 Views
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CIRCUIT DIAGRAM

CIRCUIT DIAGRAM

project.name
0 Stars     32 Views
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GATES

GATES

project.name
0 Stars     72 Views
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DL_CO_Full_Subtractor_NAND_2147033

DL_CO_Full_Subtractor_NAND_2147033

Full Subtractor using NAND Gates


project.name
0 Stars     81 Views

Gates

Gates

OR,AND,NOT,NOR,NAND,XOR,XNOR


project.name
0 Stars     40 Views

SR Latch

SR Latch

project.name
0 Stars     37 Views

GATES

GATES

project.name
0 Stars     34 Views
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Familiarization of gates

Familiarization of gates

project.name
0 Stars     32 Views
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NOR GATE

NOR GATE

NOR GATE AS UNIVERSAL GATE


project.name
0 Stars     83 Views
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EXPERIMENT 1A

EXPERIMENT 1A

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND


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0 Stars     50 Views
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Implementation of SR FLIP-FLOP using SR-LATCH

Implementation of SR LATCH using NAND Gate


project.name
0 Stars     48 Views
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Implementation of D FLIP-FLOP Using SR-Latch and NAND Gates


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0 Stars     40 Views
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Implementation of JK FLIP FLOP


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0 Stars     44 Views
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EXPERIMENT 23 MISC

EXPERIMENT 23 MISC

Implementation of D FLIP-FLOP using JK FLIP-FLOP


project.name
0 Stars     46 Views
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Implementation of a T FLIP-FLOP using JK FLIP FLOP


project.name
0 Stars     37 Views

Universal Gates

Universal Gates

Working properly



project.name
0 Stars     29 Views

Logic gates

Logic gates

These are logic gates


project.name
0 Stars     15 Views
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C1

C1

function F(D, C, B, A)= Σ(0, 1, 4, 5, 7, 8, 9, 12, 14, 15) realised only with NANDs


project.name
0 Stars     20 Views
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Lab 1

Lab 1

project.name
0 Stars     11 Views

NAND Implementation

NAND Implementation

Implemented NAND


project.name
0 Stars     6 Views

Gate1

Gate1

project.name
0 Stars     29 Views

Exemplos de portas lógicas

Exemplos de portas lógicas

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0 Stars     24 Views
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Soal 1. NAND menjadi AND

Soal 1. NAND menjadi AND

project.name
0 Stars     15 Views
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Soal 1. NAND menjadi NOT

Soal 1. NAND menjadi NOT

project.name
0 Stars     27 Views

NAND and NOR as Other gates

NAND and NOR as Other gates

project.name
0 Stars     38 Views

Universal NAND

Universal NAND

Construcción de compuertas fundamentales y derivadas mediante compuertas NAND.


project.name
0 Stars     25 Views

NOT, AND y OR a NAND

NOT, AND y OR a NAND

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

  • Natalia Andrea Álvarez Hoyos
  • Jean Carlo Montoya Castro
  • Sebastián Valencia Zapata
  • Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.


project.name
0 Stars     13 Views

TP Portes logiques ALU - PB

TP Portes logiques ALU - PB

project.name
0 Stars     20 Views

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

project.name
1 Stars     14 Views

Basic gates using universal gates

Basic gates using universal gates

project.name
0 Stars     8 Views

Lab1

Lab1

project.name
0 Stars     111 Views

3-input Logic gates

3-input Logic gates

project.name
0 Stars     12 Views

Basic Logic Gates

Basic Logic Gates

Basic Logic Gates Simulating online


project.name
0 Stars     13 Views
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The main gates

The main gates

project.name
0 Stars     13 Views

LOGIC GATES

LOGIC GATES

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.


project.name
0 Stars     28 Views

Logic Gates

Logic Gates

project.name
0 Stars     23 Views

NAND Gate

NAND Gate

project.name
0 Stars     33 Views

NAND GATE-Universal Gate

NAND GATE-Universal Gate

project.name
0 Stars     9 Views

SEEM-1 PRATICAL

SEEM-1 PRATICAL

project.name
0 Stars     13 Views

OR Gate Using NAND

OR Gate Using NAND

project.name
0 Stars     16 Views

AND Using NAND

AND Using NAND

project.name
0 Stars     14 Views

NOT Using NAND

NOT Using NAND

project.name
0 Stars     9 Views

NAND gate

NAND gate

project.name
0 Stars     39 Views

JK FlipFlop NAND Gates (Rising edge)

JK FlipFlop NAND Gates (Rising edge)

This demonstrate the JK-Flipflop.

J 0, K 0 => do nothing
J 1, K 0 => Set (Q = 1, Q' = 0)
J 0, K 1 => Reset (Q = 0, Q' = 1)
J 1, K 1 => Toggle Q and Q'



project.name
0 Stars     12 Views

ASC_04_NAND

ASC_04_NAND

Parte componenta a proiectului ASC: NAND.


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0 Stars     17 Views
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Shivam Kumar /Roll no.51/Section A.

Shivam Kumar /Roll no.51/Section A.

project.name
0 Stars     10 Views
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And Gate by NAND GATE

And Gate by NAND GATE

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0 Stars     11 Views
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OR Gate Using Nand Gate

OR Gate Using Nand Gate

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0 Stars     10 Views
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NOT GATE Using NAND GATE

NOT GATE Using NAND GATE

project.name
0 Stars     25 Views
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(B'+A'C)' Using Nand Gate And Nor Gate

(B'+A'C)' Using Nand Gate And Nor Gate

project.name
0 Stars     18 Views
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w’x’y + y’z + (x+z’)

w’x’y + y’z + (x+z’)

project.name
0 Stars     6 Views

Fire place control Pt 2

Fire place control Pt 2

project.name
0 Stars     17 Views

Simulación de Circuitos Digitales

Simulación de Circuitos Digitales

Obtener la expresión de F que permita implementarla con el menor número de puertas posible, de cualquier tipo, y representar el circuito equivalente.

F(A, B, C, D) = AB + BC + CD


project.name
0 Stars     13 Views

Simulación de Circuitos Digitales Ejercicio 2

Simulación de Circuitos Digitales Ejercicio 2

Expresión simplificada de la función F(A, B, C, D, E)


project.name
0 Stars     10 Views
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OR Gate with NAND

OR Gate with NAND

Example of OR gate built with only NAND gates.


project.name
0 Stars     8 Views

Universal Gates using NAND Gates

Universal Gates using NAND Gates

project.name
0 Stars     14 Views
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LessEqualsGreater-NAND

LessEqualsGreater-NAND

This is a 1-bit-generator comparing two 1-bit values if they are less, equals or greater the other value. Only using NAND-Gates.


project.name
0 Stars     16 Views
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external practical

external practical

project.name
0 Stars     18 Views

Full Adder using BOTH NAND and NOR gates.

Full Adder using BOTH NAND and NOR gates.

Full Adder using BOTH NAND and NOR gates.


project.name
0 Stars     76 Views

8-bit Arithmetic Logic Unit (2

8-bit Arithmetic Logic Unit (2

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).


project.name
0 Stars     32 Views

8-bit Arithmetic Logic Unit (ALU)

8-bit Arithmetic Logic Unit (ALU)

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction uses the built in component.


project.name
0 Stars     11 Views

Gerbang Logika NAND

Gerbang Logika NAND

Gerbang Logika NAND ini adalah gabungan dari gerbang AND dan gerbang NOT. Karena itu output yang dihasilkan dari gerbang NAND ini adalah kebalikan dari gerbang AND.

Berikut adalah simulasi gerbang logika dasar NAND :


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test0711

test0711

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0 Stars     11 Views
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prgm-1 basic logic gates (venkat)

prgm-1 basic logic gates (venkat)

project.name
0 Stars     12 Views
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Frequency divider

Frequency divider

A divide by 2 circuit using 8 NAND gates


project.name
1 Stars     8 Views

Basic-7Display-F-E

Basic-7Display-F-E

Projeto de exemplo para ligar o segmento  f & e do display de 7 segmentos utilizando portas lógicas.


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0 Stars     11 Views
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Logic Gates

Logic Gates

project.name
0 Stars     13 Views

Tejeswar Reddy

Tejeswar Reddy

Completed 


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0 Stars     9 Views
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1st Project

1st Project

Here is First Project ...Today dated 7-september-2023

Basic and Universal Gates


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Lab 1 : To learn and verify the truth table of the different logic gates

Lab 1 : To learn and verify the truth table of the different logic gates

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0 Stars     12 Views

Lab NO.1 : To learn study and verify the truth table of different logic gates

Lab NO.1 : To learn study and verify the truth table of different logic gates

project.name
0 Stars     9 Views

Basic Gates using Universal Gates

Basic Gates using Universal Gates

COMPLETED


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0 Stars     11 Views
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Untitled

Untitled

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0 Stars     11 Views
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COA project lab practical 1

COA project lab practical 1

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0 Stars     13 Views
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basic logic gates

basic logic gates

project.name
0 Stars     11 Views

Full Subtractor

Full Subtractor

COMPLETED


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0 Stars     5 Views

2 BIT HALF ADDER AND SUBTRACTOR

2 BIT HALF ADDER AND SUBTRACTOR

COMPLETED


project.name
0 Stars     6 Views

3 BIT FULL ADDER

3 BIT FULL ADDER

COMPLETED


project.name
0 Stars     6 Views

K-map(2)

K-map(2)

COMPLETED


project.name
0 Stars     12 Views

Gates Simulation

Gates Simulation

This is basically work on Gates (AND, NAND, OR, XOR, XNOR,)


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0 Stars     6 Views
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ROBIN KUMAR MONDAL

ROBIN KUMAR MONDAL

project.name
0 Stars     11 Views

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

project.name
0 Stars     14 Views
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Voting Box

Voting Box

A voting Box where the bigger selection (two or more) is shown unless no one votes, then nothing is shown. Only using 2 input NAND gates.


project.name
0 Stars     7 Views
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NAND Implimentation

NAND Implimentation

NAND


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0 Stars     8 Views

Logic gate is a physical device implementing a Boolean function. It performs a logic operation on one or more binary inputs and produces a single binary output.


project.name
0 Stars     17 Views

All Types of Logic Gates

All Types of Logic Gates

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates. Drag from the hollow circles to the solid circles to make connections. Right click connections to delete them. See below for more detailed instructions.

Engineering Electronics Logic


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0 Stars     13 Views

NAND only MUX

NAND only MUX

Functional MUX gate made by ONLY using NAND gates


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0 Stars     9 Views

NAND out of NOR

NAND out of NOR

project.name
0 Stars     10 Views

Untitled

Untitled

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0 Stars     8 Views
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RS NAND

RS NAND

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0 Stars     5 Views

lab2

lab2

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0 Stars     5 Views

EXPERIMENT 1 LEVEL 1

EXPERIMENT 1 LEVEL 1

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0 Stars     5 Views
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Experiment 1 Level 1

Experiment 1 Level 1

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0 Stars     4 Views
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Experiment 1 Level 1

Experiment 1 Level 1

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0 Stars     5 Views

Suchitra nilajagi

Suchitra nilajagi

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0 Stars     4 Views
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Untitleddeepak2.cv

Untitleddeepak2.cv

project.name
0 Stars     4 Views

EXPERIMENT-01-LEVEL1

EXPERIMENT-01-LEVEL1

ABC


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EXPERIMENT-01 (1)

EXPERIMENT-01 (1)

AISHWARYA M R


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0 Stars     4 Views
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EXPERIMENT-1 LOGIC GATES

EXPERIMENT-1 LOGIC GATES

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0 Stars     5 Views
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Basic gates

Basic gates

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0 Stars     4 Views
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ALL GATES

ALL GATES

ALL GATES


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EXPERIMENT 01

EXPERIMENT 01

UNIVERSAL GATES


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UNIVERSAL GATES

UNIVERSAL GATES

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0 Stars     5 Views
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BASIC GATES

BASIC GATES

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0 Stars     4 Views
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NOR IMPLIMENTATION

NOR IMPLIMENTATION

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0 Stars     4 Views
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EXP NO-1

EXP NO-1

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0 Stars     4 Views
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VERIFICATIOIN OF LOGIC GATES

VERIFICATIOIN OF LOGIC GATES

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0 Stars     4 Views

EXP 01 LEVEL 1

EXP 01 LEVEL 1

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0 Stars     4 Views

Binary Sum of 2 Bits with NAND

Binary Sum of 2 Bits with NAND

This is a proyect to express the sum of 2 bit expressions with carry, where AB + CD are the binary numbers, R2 is the MSB and R1 is the LSB of the sum, and S is the final carry, ONLY USING NAND GATES.


project.name
0 Stars     4 Views

exp 4 using nand gates

exp 4 using nand gates

project.name
1 Stars     3 Views

4-bit Multiplexer NAND Implementation

4-bit Multiplexer NAND Implementation

4-bit Multiplexer implemented in NAND gates (both 3-input and 2-input) 


project.name
0 Stars     4 Views

4-bit Multiplexer in 2-input NAND

4-bit Multiplexer in 2-input NAND

4-bit Multiplexer implemented in 2-input NAND gates.


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0 Stars     3 Views

D-Latch in NAND Implementation

D-Latch in NAND Implementation

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0 Stars     3 Views
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EXPIREMENT 5

EXPIREMENT 5

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0 Stars     3 Views

F(x, y, z)= xy + x'y'z + x'yz' and its complement using two level NAND gate only

F(x, y, z)= xy + x'y'z + x'yz' and its complement using two level NAND gate only

project.name
0 Stars     2 Views

project.name
1 Stars     1 Views
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basic circuits

basic circuits

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0 Stars     1 Views

praktikum 5

praktikum 5

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Bramki NAND oraz demultipleksery