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Tags: subtract

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23 Stars     4550 Views
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User Image me

This is a CPU witch is capable of executing a lot of stuff in one clock cycle, and this CPU can shift left up to 7 times and shift right up to 7 times witch means that it is possible to  multiply and divide in one clock cycle if you program a table in the program memory. it has a 32 bit instruction width and a 8 bit address. it also has 

The ALU has the following operations:

  • ADD
  • SUBTRACT
  • SHIFT_LEFT (up to 7 times per cycle 3 bit)
  • SHIFT_RIGHT (up to 7 times per cycle 3 bit)
  • XOR
  • OR
  • NOT

This Was made by miles


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0 Stars     96 Views

SumadorRestador

SumadorRestador

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1 Stars     324 Views
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8-bit arithmetic

8-bit arithmetic

An 8-bit addition/subtraction unit with two's complement arithmetic and an accumulator.

BCD displays are added for nicer user experience.

First steps in CircuitVerse


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2 Stars     141 Views
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About the Combinox R1:

This is the third 16-bit CPU I have made. Its new name was inspired by the new combinational code. It is also my first computer to feature a graphics and base ten display. As a result of its brand new architecture, code, and clock it is much faster than my previous CPUs. 


Directions for use:

Choose the desired EEPROM program and insert it into the slot. First press the "RESET" button. Now press the "ON" button and enjoy your program.


Descriptions of programs:

blank: A blank EEPROM to be coded.

count up forever: Counts up by one until it reaches 65,535 then loops back to 0.

2+2: adds 2+2 and displays the output to the number display

transfer from keyboard to display: Displays the ascii value of whatever key is being entered on the keyboard.

random noise: Displays random noise on the screen.

Fibonacci: calculates the Fibonacci sequence 


Credits:

Sanderokian Stfetoneri - clock

Sanderokian Stfetoneri - 16 bit division



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0 Stars     34 Views
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16-bit calculator +/-

16-bit calculator +/-

A simple 16-bit calculator that can add and subtract two numbers together.


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0 Stars     29 Views
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A multi-step design of a synchronized 4-bit add/subtractor with overflow detection utilizing a 4 bit-to-4bit bus converter design and bus splitters.