Searched Projects

Tags: OR

project.name
0 Stars     81 Views
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LED_OR

LED_OR
OR
Here we are using OR gate and connected LED with the OR gate and giving the input so that we can get the output.

project.name
0 Stars     118 Views
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OR_NAND

OR_NAND
Here, we have used 3 NAND gates to derive OR gate.

project.name
0 Stars     92 Views
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OR_NOR

OR_NOR
Here, we have used three NOR gates to design an OR gate.

project.name
0 Stars     55 Views

AND & OR gates

AND & OR gates
OR

It's my first project. Stay tuned for more good content!


project.name
0 Stars     81 Views

Basic Gates

Basic Gates

This is just a simple project to get some practice with CircuitVerse and simple gates such as AND, OR, NOT.


project.name
0 Stars     63 Views

57838_πειραματική διάταξη με πύλες NOT,AND,OR

57838_πειραματική διάταξη με πύλες NOT,AND,OR

project.name
0 Stars     66 Views

57838_πειραματικη διάταξη με πυλές NOT,AND,OR απλοποιημένη

57838_πειραματικη διάταξη με πυλές NOT,AND,OR απλοποιημένη

project.name
0 Stars     57 Views
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COMPUERTAS

COMPUERTAS

project.name
0 Stars     52 Views

P1

P1
OR

project.name
0 Stars     80 Views

Experiment-1

Experiment-1

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR


project.name
0 Stars     62 Views
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EXP-1 SAHIL JAIN

EXP-1 SAHIL JAIN

project.name
0 Stars     69 Views

GATES

GATES

project.name
0 Stars     59 Views

logic gates

logic gates

project.name
0 Stars     66 Views
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Basic gates from NAND gate

Basic gates from NAND gate

project.name
0 Stars     51 Views

AND and OR

AND and OR

project.name
0 Stars     33 Views

OR

OR
OR

project.name
0 Stars     53 Views

project.name
0 Stars     62 Views
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Basic Logic Gates

Basic Logic Gates

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,


project.name
0 Stars     68 Views
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Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic Gates


Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)



project.name
0 Stars     47 Views
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NAND CONVERTOR

NAND CONVERTOR

We have three circuits made with NAND, one with the same result of doing an OR, another one to AND and the last one to NOT


project.name
1 Stars     83 Views
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Full Adder

Full Adder

My first attempt at an full adder. This is a logical circuit that performs an addition operation on three one bit binary numbers. The full adder produces a sum of three inputs and a carry value.


project.name
1 Stars     61 Views
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Creating OR gate from AND gate and NOT gate

Creating OR gate from AND gate and NOT gate

I have used a NOT gate and an AND gate to create an OR gate.


project.name
0 Stars     61 Views
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XOR GATE from AND, NOT, OR gate

XOR GATE from AND, NOT, OR gate

I used an AND, NOT and OR gates to create an XOR gate


project.name
0 Stars     45 Views
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Logic gates

Logic gates

project.name
0 Stars     44 Views

Untitled

Untitled

(A'+B')(A(B+C'))'+A(B'+C')


project.name
0 Stars     67 Views
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FAMILIRIZATION OF LOGIC GATES

FAMILIRIZATION OF LOGIC GATES

project.name
0 Stars     59 Views

FAMILIARISATION OF CIRCUITS

FAMILIARISATION OF CIRCUITS

Result: Familiarisation with logic gates through virtual lab successfully completed.


project.name
0 Stars     71 Views

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.


project.name
0 Stars     67 Views

HALF AND FULL ADDER

HALF AND FULL ADDER

Successfully completed half and full adder using gates and universal gates.


project.name
0 Stars     56 Views

experiment one

experiment one

lab experiment 



project.name
0 Stars     57 Views

gates

gates

project.name
1 Stars     54 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     74 Views
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ALU_ROrg2021

ALU_ROrg2021

Rechnerorganisation TU Berlin WS2021


project.name
0 Stars     59 Views

lOGIC GATES

lOGIC GATES

project.name
0 Stars     50 Views
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Full Adder

Full Adder

project.name
0 Stars     52 Views

exp 1

exp 1

project.name
0 Stars     59 Views

GATES

GATES

project.name
0 Stars     52 Views
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LOGIC GATES

LOGIC GATES

AND GATE:-A*B

OR GATE:-A+B

NOT GATE:-A`

NAND GATE:-(A*B)`

NOR GATE:-(A+B)`

XOR GATE:-A^B  i.e. , A`B+AB`

XNOR GATE:-(A^B)` i.e. , AB+A`B`










project.name
0 Stars     60 Views
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Logic GATES

Logic GATES

project.name
0 Stars     74 Views
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From NAND to Tetris Ch.1

From NAND to Tetris Ch.1

project.name
0 Stars     66 Views

Experiment-1(Basic Gates)

Experiment-1(Basic Gates)

Introduction to logic gates and it's verification with truth table.


project.name
0 Stars     85 Views

project.name
0 Stars     52 Views

EXPERIMENT 1 A

EXPERIMENT 1 A

project.name
0 Stars     22 Views

Gates

Gates

project.name
0 Stars     28 Views
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Gates

Gates

Puertas Logicas


project.name
0 Stars     51 Views

Verifying basic Gates

Verifying basic Gates

Verifying the truth tables of Basic and Universal Gates


project.name
0 Stars     44 Views

Verifying Basic Gates

Verifying Basic Gates

project.name
0 Stars     52 Views

Verifying Basic Gates

Verifying Basic Gates

Verification of basic gates


project.name
0 Stars     47 Views

Verifying basic gates

Verifying basic gates

Representation of 7 logic gates.


project.name
0 Stars     60 Views
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Simple Logic Gates

Simple Logic Gates

Basic logic gates. Demonstrator for basic lectures on business information systems


project.name
0 Stars     38 Views

1Projeto

1Projeto

Meu primeiro projeto no CV


project.name
0 Stars     35 Views

LOGIC GATES

LOGIC GATES

project.name
0 Stars     31 Views
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Verification of gates

Verification of gates

verification of truth table


project.name
0 Stars     34 Views
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Al gates verify

Al gates verify

project.name
1 Stars     29 Views
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Função majoritária

Função majoritária

Função majoritária utilizando portas AND e OR


project.name
0 Stars     37 Views
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logic gates

logic gates

project.name
0 Stars     40 Views
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Somador Completo

Somador Completo

Somador completo para somar 1 bit.


project.name
0 Stars     41 Views

Logic Gates

Logic Gates

project.name
0 Stars     55 Views
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Experiment 1

Experiment 1


project.name
0 Stars     49 Views

Basic Logic Gates

Basic Logic Gates

Basic circuits of all gates


project.name
0 Stars     25 Views
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24/08/21

24/08/21

project.name
0 Stars     48 Views

Basic Logic Gates

Basic Logic Gates

project.name
0 Stars     35 Views

project.name
0 Stars     38 Views
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practical 1

practical 1

3 INPUT PRACTICAL


project.name
0 Stars     27 Views

Practical 1

Practical 1

project.name
0 Stars     13 Views

Firstorgate

Firstorgate

project.name
0 Stars     29 Views

EXPERIMENT:1

EXPERIMENT:1

project.name
0 Stars     54 Views

LOGIC

LOGIC

project.name
0 Stars     51 Views

LOGIC

LOGIC

project.name
0 Stars     27 Views
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EXPERIMENT 1

EXPERIMENT 1

SREELAKSHMI M


project.name
1 Stars     27 Views
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EXPERIMENT 1

EXPERIMENT 1

Sreelakshmi M


project.name
1 Stars     22 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     24 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     25 Views
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EXPERIMENT 1

EXPERIMENT 1

project.name
0 Stars     23 Views
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EXPT NO 2

EXPT NO 2

project.name
0 Stars     29 Views

first

first

project.name
0 Stars     38 Views

Exp1

Exp1

project.name
0 Stars     30 Views
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Logic Gates

Logic Gates

project.name
0 Stars     50 Views
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CIRCUIT DIAGRAM

CIRCUIT DIAGRAM

project.name
0 Stars     32 Views
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GATES

GATES

project.name
0 Stars     9 Views
User:

project.name
0 Stars     83 Views

Gates

Gates

OR,AND,NOT,NOR,NAND,XOR,XNOR


project.name
0 Stars     37 Views

GATES

GATES

project.name
0 Stars     34 Views
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Familiarization of gates

Familiarization of gates

project.name
0 Stars     32 Views
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NAND GATES

NAND GATES

NAND GATE AS A UNIVERSAL GATE


project.name
0 Stars     32 Views
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NOR GATE

NOR GATE

NOR GATE AS UNIVERSAL GATE


project.name
0 Stars     24 Views

REALIZATION OF BASIC GATES

REALIZATION OF BASIC GATES

project.name
0 Stars     35 Views

halfAdder

halfAdder

Half adder gate


project.name
0 Stars     84 Views
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EXPERIMENT 1A

EXPERIMENT 1A

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND


project.name
0 Stars     57 Views
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EXPERIMENT 1A ii

EXPERIMENT 1A ii

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NOR


project.name
0 Stars     33 Views

BasicGates

BasicGates

My first practice on Basic gates(AND,OR,NOT).


project.name
0 Stars     29 Views

Logic gates

Logic gates

These are logic gates


project.name
1 Stars     21 Views

Logic Gate Example

Logic Gate Example

project.name
0 Stars     20 Views
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Lab 1

Lab 1

project.name
0 Stars     38 Views

GATES_TRUTH_TABLE

GATES_TRUTH_TABLE

project.name
1 Stars     12 Views

AND-OR-NOT_VIVEKLOHAR

AND-OR-NOT_VIVEKLOHAR

SLRTCE IE subject practical no.1


project.name
0 Stars     41 Views
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Circuts Homework 1-6

Circuts Homework 1-6

Correctly recreated the following circuits within your circuitverse.com account, then use the circuits you recreated to complete the following truth tables.


project.name
0 Stars     10 Views
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B20AI048_Scratch_XOR

B20AI048_Scratch_XOR

project.name
0 Stars     30 Views

Exemplos de portas lógicas

Exemplos de portas lógicas

project.name
0 Stars     36 Views

Portas Lógicas

Portas Lógicas

Portas lógicas principais.


project.name
0 Stars     18 Views

4 Bit ALU system

4 Bit ALU system

project.name
0 Stars     363 Views
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1-BIT ALU CIRCUIT

1-BIT ALU CIRCUIT

Simple Arithmetic Logic Unit


project.name
0 Stars     26 Views

NOT, AND y OR a NAND

NOT, AND y OR a NAND

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

  • Natalia Andrea Álvarez Hoyos
  • Jean Carlo Montoya Castro
  • Sebastián Valencia Zapata
  • Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.


project.name
0 Stars     20 Views

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

project.name
1 Stars     14 Views

Basic gates using universal gates

Basic gates using universal gates

project.name
0 Stars     6 Views

Combinational Circuits

Combinational Circuits

project.name
0 Stars     8 Views
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Riya_Roy_it2021004

Riya_Roy_it2021004

project.name
0 Stars     116 Views

3-input Logic gates

3-input Logic gates

project.name
0 Stars     12 Views
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Untitled

Untitled

project.name
0 Stars     13 Views
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2

2

project.name
0 Stars     26 Views
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PROJECT 4

PROJECT 4

project.name
0 Stars     29 Views

PROJECT

PROJECT

project.name
0 Stars     23 Views

FULL ADDER AND SUBRACTOR

FULL ADDER AND SUBRACTOR

project.name
0 Stars     25 Views

Untitled

Untitled

project.name
0 Stars     27 Views
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MULTIPLEXER

MULTIPLEXER

project.name
0 Stars     15 Views

BASIC GATES

BASIC GATES

project.name
0 Stars     23 Views

MULTIPLEXER

MULTIPLEXER

project.name
0 Stars     12 Views

Basic Logic Gates

Basic Logic Gates

Basic Logic Gates Simulating online


project.name
0 Stars     8 Views

Multiplexer (Selector)

Multiplexer (Selector)

project.name
1 Stars     42 Views

CP220 Lab 2a, 2b 23/9/2022 Automatic Door Circuit

CP220 Lab 2a, 2b 23/9/2022 Automatic Door Circuit

Little circuit for auto door, 3 inputs, 1 output

NOT gate, AND gate (x2), OR gate


project.name
0 Stars     13 Views
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The main gates

The main gates

project.name
0 Stars     10 Views
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simple encoder

simple encoder

project.name
0 Stars     12 Views
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Full-Adder using half-Adder

Full-Adder using half-Adder

project.name
0 Stars     10 Views
User:

Full-Adder using Half-Adder blocks

Full-Adder using Half-Adder blocks

project.name
0 Stars     14 Views

LOGIC GATES

LOGIC GATES

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.


project.name
0 Stars     30 Views

Logic Gates

Logic Gates

project.name
0 Stars     18 Views

OR Gate

OR Gate

project.name
0 Stars     27 Views

OR Gate-Basic Gate

OR Gate-Basic Gate

project.name
0 Stars     18 Views
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LAB ASSIGNMENT 1

LAB ASSIGNMENT 1

project.name
0 Stars     14 Views

OR gate

OR gate
OR

project.name
2 Stars     74 Views

This is a Hexadecimal ALU with 6 status flags!

UF and OF are underflow and overflow respectivly 


project.name
0 Stars     17 Views

AND OR

AND OR

project.name
0 Stars     17 Views
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Shivam Kumar /Roll no.51/Section A.

Shivam Kumar /Roll no.51/Section A.

project.name
0 Stars     14 Views
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XNOR Gate

XNOR Gate

project.name
0 Stars     12 Views
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OR Gate Using Nand Gate

OR Gate Using Nand Gate

project.name
0 Stars     10 Views
User:

OR GATE Using NOR GATE

OR GATE Using NOR GATE

project.name
0 Stars     15 Views

Basic Logic Gates

Basic Logic Gates

Fundamental logical functions are performed using basic logic gates. These are the fundamental components of integrated circuits.


project.name
0 Stars     18 Views

Simulación de Circuitos Digitales Ejercicio 2

Simulación de Circuitos Digitales Ejercicio 2

Expresión simplificada de la función F(A, B, C, D, E)


project.name
0 Stars     15 Views

compuertas AND OR NOT

compuertas AND OR NOT

Éste es el ejercicio 1 de Laboratorio de Circuitos Digitales de la materia Tecnología de Computadores


project.name
0 Stars     10 Views
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OR Gate with NAND

OR Gate with NAND

Example of OR gate built with only NAND gates.


project.name
0 Stars     16 Views
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external practical

external practical

project.name
0 Stars     86 Views

8-bit Arithmetic Logic Unit (2

8-bit Arithmetic Logic Unit (2

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).


project.name
0 Stars     36 Views

8-bit Arithmetic Logic Unit (ALU)

8-bit Arithmetic Logic Unit (ALU)

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction uses the built in component.


project.name
0 Stars     14 Views

Gerbang Logika OR

Gerbang Logika OR

Gerbang Logika OR ini memerlukan dua input untuk menghasilkan satu output. Gerbang Logika OR ini akan menghasilkan output 1 jika semua atau salah satu input merupakan bilangan biner 1. Sedangkan output akan menghasilkan 0 jika semua inputnya adalah bilangan biner 0.

Berikut adalah simulasi gerbang logika dasar OR :


project.name
0 Stars     11 Views
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Implementation of AND,OR,NOT Gates using NAND Gate

Implementation of AND,OR,NOT Gates using NAND Gate

project.name
0 Stars     11 Views
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prgm-1 basic logic gates (venkat)

prgm-1 basic logic gates (venkat)

project.name
0 Stars     10 Views
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basic logic gates exp1

basic logic gates exp1

project.name
0 Stars     12 Views
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Logic Gates

Logic Gates

project.name
0 Stars     14 Views

Tejeswar Reddy

Tejeswar Reddy

Completed 


project.name
0 Stars     9 Views
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1st Project

1st Project

Here is First Project ...Today dated 7-september-2023

Basic and Universal Gates


project.name
0 Stars     15 Views
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Lab 1 : To learn and verify the truth table of the different logic gates

Lab 1 : To learn and verify the truth table of the different logic gates

project.name
0 Stars     14 Views

Lab NO.1 : To learn study and verify the truth table of different logic gates

Lab NO.1 : To learn study and verify the truth table of different logic gates

project.name
0 Stars     9 Views

Basic Gates using Universal Gates

Basic Gates using Universal Gates

COMPLETED


project.name
0 Stars     9 Views

Half Adder

Half Adder

completed


project.name
0 Stars     12 Views
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Untitled

Untitled

project.name
0 Stars     8 Views

OR using NAND

OR using NAND
OR

Implementation of OR gate using three NAND gate


project.name
0 Stars     12 Views
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COA project lab practical 1

COA project lab practical 1

project.name
0 Stars     14 Views
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basic logic gates

basic logic gates

project.name
0 Stars     14 Views

Full Subtractor

Full Subtractor

COMPLETED


project.name
0 Stars     12 Views
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Tushar Singh

Tushar Singh

project.name
0 Stars     9 Views

K-map

K-map

COMPLETED



project.name
0 Stars     12 Views

Gates Simulation

Gates Simulation

This is basically work on Gates (AND, NAND, OR, XOR, XNOR,)


project.name
0 Stars     11 Views

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

project.name
0 Stars     5 Views

BASIC LOGIC GATES

BASIC LOGIC GATES

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates.

What is logic gates coding?
In a circuit, logic gates will make decisions based on a combination of digital signals coming from its inputs. Most logic gates have two inputs and one output. Logic gates are based on Boolean algebra. At any given moment, every terminal is in one of the two binary conditions, false or true.

project.name
0 Stars     8 Views

Logic gate is a physical device implementing a Boolean function. It performs a logic operation on one or more binary inputs and produces a single binary output.


project.name
0 Stars     18 Views

All Types of Logic Gates

All Types of Logic Gates

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates. Drag from the hollow circles to the solid circles to make connections. Right click connections to delete them. See below for more detailed instructions.

Engineering Electronics Logic


project.name
1 Stars     11 Views

Encoder (8*3)

Encoder (8*3)

Encoder of Octal to Binary digits

How to use :

1. According to Label input logic 1 .

        For example*. for 7 input logic 1 in y7

you will get input in the form of A2 A1 A0



project.name
0 Stars     10 Views

Untitled

Untitled

project.name
0 Stars     4 Views
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Untitled

Untitled

project.name
0 Stars     6 Views

lab2

lab2

project.name
0 Stars     3 Views
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Experiment 1 level 1

Experiment 1 level 1

Basic gates statements


project.name
0 Stars     5 Views

EXPERIMENT 1 LEVEL 1

EXPERIMENT 1 LEVEL 1

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0 Stars     5 Views
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Experiment 1 Level 1

Experiment 1 Level 1

project.name
0 Stars     4 Views
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Experiment 1 Level 1

Experiment 1 Level 1

project.name
0 Stars     6 Views

Suchitra nilajagi

Suchitra nilajagi

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0 Stars     4 Views
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Untitled

Untitled

project.name
0 Stars     4 Views
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Experiment lvl 2

Experiment lvl 2

project.name
0 Stars     5 Views
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Untitleddeepak2.cv

Untitleddeepak2.cv

project.name
0 Stars     3 Views
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Devika P

Devika P

project.name
0 Stars     7 Views

EXPERIMENT-01-LEVEL1

EXPERIMENT-01-LEVEL1

ABC


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0 Stars     7 Views
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EXPERIMENT-01 (1)

EXPERIMENT-01 (1)

AISHWARYA M R


project.name
0 Stars     4 Views
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EXPERIMENT-1 LOGIC GATES

EXPERIMENT-1 LOGIC GATES

project.name
0 Stars     5 Views
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EXPERIMENT-01 (2)

EXPERIMENT-01 (2)

AISHWARYA M R


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0 Stars     5 Views
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Basic gates

Basic gates

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0 Stars     4 Views
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ALL GATES

ALL GATES

ALL GATES


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0 Stars     4 Views
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EXPERIMENT 1 LEVEL 2

EXPERIMENT 1 LEVEL 2

LEVEL 2


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0 Stars     4 Views
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EXPERIMENT 1 LEVEL2

EXPERIMENT 1 LEVEL2

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0 Stars     5 Views
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BASIC GATES

BASIC GATES

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0 Stars     5 Views
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IMPLIMENTATION OF LOGIC GATES USING UNIVERSAL GATES

IMPLIMENTATION OF LOGIC GATES USING UNIVERSAL GATES

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0 Stars     4 Views
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NOR IMPLIMENTATION

NOR IMPLIMENTATION

project.name
0 Stars     3 Views
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EXP 1

EXP 1

1) TO VERIFY TRUTH TABLE OF ALL LOGIC GATES

2) TO DERIVE THE AND,OR,NOT,XOR,XNOR,NABD,&NOR  LOGIC USING UNIVERSAL GATES


project.name
0 Stars     3 Views

project 2

project 2

project


project.name
0 Stars     4 Views
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EXP NO-1

EXP NO-1

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0 Stars     3 Views
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GATES

GATES

project.name
0 Stars     4 Views

EXP 2 - VERIFICATION OF BOOLEAN LAWS

EXP 2 - VERIFICATION OF BOOLEAN LAWS

LAWS


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0 Stars     6 Views
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VERIFICATIOIN OF LOGIC GATES

VERIFICATIOIN OF LOGIC GATES

project.name
0 Stars     3 Views
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Untitled

Untitled

project.name
0 Stars     3 Views
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EXP 3 4:1 MUX

EXP 3 4:1 MUX

project.name
0 Stars     4 Views

EXP 01 LEVEL 1

EXP 01 LEVEL 1

project.name
0 Stars     4 Views

EXPERIMENT 3 - LEVEL 1 - DESIGN OF COMBINATIONAL CIRCUITS

EXPERIMENT 3 - LEVEL 1 - DESIGN OF COMBINATIONAL CIRCUITS

project.name
0 Stars     3 Views

EXPERIMENT 3 - LEVEL 2

EXPERIMENT 3 - LEVEL 2

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0 Stars     5 Views
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design of combinational circuits

design of combinational circuits

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0 Stars     3 Views
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LOOK AHEAD CARRY ADDER

LOOK AHEAD CARRY ADDER

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0 Stars     4 Views
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EXPERIMENT 01--LEVEL 02

EXPERIMENT 01--LEVEL 02

USING NANAD & NOR GATES 

DERIVING ALL GATES


project.name
0 Stars     3 Views
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3 Input OR Gate with only NOR Gates

3 Input OR Gate with only NOR Gates

A 3-Input OR Gate built with 4 NOR Gates Can be implemented with 1 7402 circuit


project.name
0 Stars     4 Views

Untitled

Untitled

1ST ASSINGMENT


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BASIC LOGIC GATES

BASIC LOGIC GATES

I HAVE DRAWN THE TRUTH TABLE THERE THATS WHY I HAVE NOT VERIFY THOSE INDIVIDUALY    ,  THIS IS ALL ABOUT BASIC LOGIC GATES.


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basic circuits

basic circuits

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