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It's my first project. Stay tuned for more good content!

This is just a simple project to get some practice with CircuitVerse and simple gates such as AND, OR, NOT.

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,

Design and Realiization of Basic Logic Gates

Roll No. :- 12100119047
Dept. :- CSE (A)

We have three circuits made with NAND, one with the same result of doing an OR, another one to AND and the last one to NOT

My first attempt at an full adder. This is a logical circuit that performs an addition operation on three one bit binary numbers. The full adder produces a sum of three inputs and a carry value.

I have used a NOT gate and an AND gate to create an OR gate.

I used an AND, NOT and OR gates to create an XOR gate

(A'+B')(A(B+C'))'+A(B'+C')

Result: Familiarisation with logic gates through virtual lab successfully completed.

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.

Successfully completed half and full adder using gates and universal gates.

lab experiment 

Rechnerorganisation TU Berlin WS2021

AND GATE:-A*B

OR GATE:-A+B

NOT GATE:-A`

NAND GATE:-(A*B)`

NOR GATE:-(A+B)`

XOR GATE:-A^B  i.e. , A`B+AB`

XNOR GATE:-(A^B)` i.e. , AB+A`B`

Introduction to logic gates and it's verification with truth table.

Puertas Logicas

Verifying the truth tables of Basic and Universal Gates

Verification of basic gates

Representation of 7 logic gates.

Basic logic gates. Demonstrator for basic lectures on business information systems

Meu primeiro projeto no CV

verification of truth table

Função majoritária utilizando portas AND e OR

Somador completo para somar 1 bit.

Basic circuits of all gates

3 INPUT PRACTICAL

SREELAKSHMI M

Sreelakshmi M

OR,AND,NOT,NOR,NAND,XOR,XNOR

NAND GATE AS A UNIVERSAL GATE

NOR GATE AS UNIVERSAL GATE

Half adder gate

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NOR

My first practice on Basic gates(AND,OR,NOT).

These are logic gates

SLRTCE IE subject practical no.1

Correctly recreated the following circuits within your circuitverse.com account, then use the circuits you recreated to complete the following truth tables.

Portas lógicas principais.

Simple Arithmetic Logic Unit

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

• Natalia Andrea Álvarez Hoyos
• Jean Carlo Montoya Castro
• Sebastián Valencia Zapata
• Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.

Basic Logic Gates Simulating online

Little circuit for auto door, 3 inputs, 1 output

NOT gate, AND gate (x2), OR gate

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.

This is a Hexadecimal ALU with 6 status flags!

UF and OF are underflow and overflow respectivly 

Fundamental logical functions are performed using basic logic gates. These are the fundamental components of integrated circuits.

Expresión simplificada de la función F(A, B, C, D, E)

Éste es el ejercicio 1 de Laboratorio de Circuitos Digitales de la materia Tecnología de Computadores

Example of OR gate built with only NAND gates.

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction uses the built in component.

Gerbang Logika OR ini memerlukan dua input untuk menghasilkan satu output. Gerbang Logika OR ini akan menghasilkan output 1 jika semua atau salah satu input merupakan bilangan biner 1. Sedangkan output akan menghasilkan 0 jika semua inputnya adalah bilangan biner 0.

Berikut adalah simulasi gerbang logika dasar OR :

Completed 

Here is First Project ...Today dated 7-september-2023

Basic and Universal Gates

COMPLETED

completed

Implementation of OR gate using three NAND gate

COMPLETED

COMPLETED

This is basically work on Gates (AND, NAND, OR, XOR, XNOR,)

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates.

Logic gate is a physical device implementing a Boolean function. It performs a logic operation on one or more binary inputs and produces a single binary output.

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates. Drag from the hollow circles to the solid circles to make connections. Right click connections to delete them. See below for more detailed instructions.

Engineering Electronics Logic

Encoder of Octal to Binary digits

How to use :

1. According to Label input logic 1 .

        For example*. for 7 input logic 1 in y7

you will get input in the form of A2 A1 A0

Basic gates statements

ABC

AISHWARYA M R

AISHWARYA M R

ALL GATES

LEVEL 2

1) TO VERIFY TRUTH TABLE OF ALL LOGIC GATES

2) TO DERIVE THE AND,OR,NOT,XOR,XNOR,NABD,&NOR  LOGIC USING UNIVERSAL GATES

project

LAWS

USING NANAD & NOR GATES 

DERIVING ALL GATES

A 3-Input OR Gate built with 4 NOR Gates Can be implemented with 1 7402 circuit

1ST ASSINGMENT

Implement basic logic gates (AND, OR, NOT) using NOR gates only. Assignment given by Dr. Ankita Vaish. Institute : Banaras Hindu University.

Draw the logic diagram to implement basic logic gates (AND, OR, NOT) using NAND gates only. Assignment given by Dr. Ankita Vaish. Institute : Banaras Hindu University.

I HAVE DRAWN THE TRUTH TABLE THERE THATS WHY I HAVE NOT VERIFY THOSE INDIVIDUALY    ,  THIS IS ALL ABOUT BASIC LOGIC GATES.