Searched Projects

Tags: OR

project.name
0 Stars     63 Views
User:
User Image Arya Patel

LED_OR

OR
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Here we are using OR gate and connected LED with the OR gate and giving the input so that we can get the output.
project.name
0 Stars     83 Views
User:
User Image Arya Patel

OR_NAND

OR NAND
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Here, we have used 3 NAND gates to derive OR gate.
project.name
0 Stars     70 Views
User:
User Image Arya Patel

OR_NOR

OR NOR
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Here, we have used three NOR gates to design an OR gate.
project.name
0 Stars     44 Views
User:
User Image Jakub 'Greku' Tarczewski

AND & OR gates

OR
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It's my first project. Stay tuned for more good content!

project.name
0 Stars     61 Views
User:
User Image Falko Schmidt

Basic Gates

Gates AND OR NOT
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This is just a simple project to get some practice with CircuitVerse and simple gates such as AND, OR, NOT.

project.name
0 Stars     39 Views
User:
User Image Georgia-Eirini Lazaridou

57838_πειραματική διάταξη με πύλες NOT,AND,OR

NOT AND OR
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project.name
0 Stars     44 Views
User:
User Image Georgia-Eirini Lazaridou

57838_πειραματικη διάταξη με πυλές NOT,AND,OR απλοποιημένη

NOT AND OR
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project.name
0 Stars     40 Views
User:
User Image Diego

COMPUERTAS

AND OR NOT NOR NAND
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project.name
0 Stars     35 Views
User:
User Image Juginder Singh ( AP, CS)

P1

OR
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project.name
0 Stars     46 Views
User:
User Image Shatanshu Agarwal

Experiment-1

AND OR NOT NAND NOR XOR XNOR
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1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR

project.name
0 Stars     38 Views
User:
User Image SAHIL Jain

EXP-1 SAHIL JAIN

GATES (AND NOT OR NOR EX-OR EX-NOR)
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project.name
0 Stars     42 Views
User:
User Image Sanya Tyagi

GATES

AND OR NOT NAND NOR EX-OR EX-NOR
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project.name
0 Stars     37 Views
User:
User Image AKASHDEEP GUPTA

logic gates

(AND OR NOT NAND NOR Ex-OR and Ex-NOR).
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project.name
0 Stars     48 Views
User:
User Image Sameer Alam

Basic gates from NAND gate

AND OR NOR NAND
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project.name
0 Stars     35 Views
User:
User Image Alfina Graceline J

AND and OR

AND OR
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project.name
0 Stars     23 Views
User:
User Image Alfina Graceline J

OR

OR
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project.name
0 Stars     36 Views
User:
User Image Gabriel Hofer

Circuit 3

NOT OR AND each constructed from one MUX
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project.name
0 Stars     39 Views
User:
User Image Yadnika wagh

Basic Logic Gates

NOT AND OR NAND NOR XNOR
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This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,

project.name
0 Stars     48 Views
User:
User Image Ujjwal Kar

Design and Realiization of Basic Logic gates

AND OR NOT NAND XOR
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Design and Realiization of Basic Logic Gates

Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)


project.name
0 Stars     35 Views
User:
User Image amba

NAND CONVERTOR

OR AND NOT WITH NAND
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We have three circuits made with NAND, one with the same result of doing an OR, another one to AND and the last one to NOT

project.name
1 Stars     60 Views
User:
User Image Daniel Lumu

Full Adder

Full Adder AND XOR OR
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My first attempt at an full adder. This is a logical circuit that performs an addition operation on three one bit binary numbers. The full adder produces a sum of three inputs and a carry value.

project.name
1 Stars     41 Views
User:
User Image Daniel Lumu

Creating OR gate from AND gate and NOT gate

AND NOT OR
View

I have used a NOT gate and an AND gate to create an OR gate.

project.name
0 Stars     43 Views
User:
User Image Daniel Lumu

XOR GATE from AND, NOT, OR gate

XOR OR NOT AND
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I used an AND, NOT and OR gates to create an XOR gate

project.name
0 Stars     34 Views
User:
User Image Joffin Joel

Logic gates

AND OR NOT ....XNOR gates
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project.name
0 Stars     31 Views
User:
User Image SUBHENDU DALAI 2047024

Untitled

OR AND NOT
View

(A'+B')(A(B+C'))'+A(B'+C')

project.name
0 Stars     43 Views
User:
User Image ROHITHA KA

FAMILIRIZATION OF LOGIC GATES

OR AND NAND NOT NOR
View
project.name
0 Stars     37 Views
User:
User Image ANUSHIKA P J

FAMILIARISATION OF CIRCUITS

AND OR NAND NOR XNOR XOR NOT
View

Result: Familiarisation with logic gates through virtual lab successfully completed.

project.name
0 Stars     51 Views
User:
User Image ANUSHIKA P J

FAMILIARISATION OF LOGIC GATES USING UNIVERSAL GATES

AND OR NAND NOR XNOR XOR NOT USING NAND AND NOR
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RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.

project.name
0 Stars     43 Views
User:
User Image ANUSHIKA P J

HALF AND FULL ADDER

AND OR NAND NOR XNOR XOR NOT
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Successfully completed half and full adder using gates and universal gates.

project.name
0 Stars     35 Views
User:
User Image Mandeep Kumar

experiment one

OR AND NOT XOR XNOR
View

lab experiment 


project.name
0 Stars     35 Views
User:
User Image ANUBHAV MAURYA

gates

AND OR XOR XNOR
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project.name
1 Stars     37 Views
User:
User Image Rekha Rani

EXPERIMENT 1

AND OR NOR XOR NOT GATE
View
project.name
0 Stars     50 Views
User:
User Image Chrilosoph

ALU_ROrg2021

ALU AND OR NAND NOR ADD SUB
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Rechnerorganisation TU Berlin WS2021

project.name
0 Stars     38 Views
User:
User Image Rohit Kumar Chaurasia

lOGIC GATES

AND OR NOT XOR NAND NOR XNOR
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project.name
0 Stars     38 Views
User:
User Image DivyanshMCA

Full Adder

XOR AND OR
View
project.name
0 Stars     34 Views
User:
User Image Mandeep Kumar

exp 1

OR AND NOT XOR XNOR
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project.name
0 Stars     43 Views
User:
User Image Priyanka Raghuvanshi

GATES

OR AND NOT NAND XOR XNOR GATES
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project.name
0 Stars     34 Views
User:
User Image Vaibhav1063

LOGIC GATES

OR AND NOT XOR NAND GATE
View

AND GATE:-A*B

OR GATE:-A+B

NOT GATE:-A`

NAND GATE:-(A*B)`

NOR GATE:-(A+B)`

XOR GATE:-A^B  i.e. , A`B+AB`

XNOR GATE:-(A^B)` i.e. , AB+A`B`









project.name
0 Stars     38 Views
User:
User Image Narendran S

Logic GATES

logic gates AND OR NOT EXOR NAND NOR
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project.name
0 Stars     54 Views
User:
User Image Michelle Lo

From NAND to Tetris Ch.1

NOT AND NAND OR NOR XOR XNOR
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project.name
0 Stars     45 Views
User:
User Image 356_Mangsura Kabir Oni

Experiment-1(Basic Gates)

AND OR NOT NAND NOR Gates
View

Introduction to logic gates and it's verification with truth table.

project.name
0 Stars     52 Views
User:
User Image Chirantan Basu

CO LAB

AND OR NOT NAND NOR XOR XNOR HALF ADDER HALF SUBTRACTOR FULL ADDER FULL SUBTRACTOR RIPPLE CARRY ADDER BCD CARRY LOOK AHEAD BINARY INCREMENTER BINARY DECREMENTER ADDER SUBTRACTOR 4:2 DECODER 2:1MUX
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project.name
0 Stars     32 Views
User:
User Image YAZID K P (RA1911018010071)

EXPERIMENT 1 A

AND OR NAND NOT NOR XOR X-NOR A
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project.name
0 Stars     12 Views
User:
User Image Anmol Kumar Shrivastava

Gates

AND NAND NOR OR
View
project.name
0 Stars     17 Views
User:
User Image CA SIS

Gates

NOT OR NAND
View

Puertas Logicas

project.name
0 Stars     36 Views
User:
User Image JOEL GREGORY RAJAN MBT19CS067

Verifying basic Gates

AND NAND OR NOR NOT XOR XNOR
View

Verifying the truth tables of Basic and Universal Gates

project.name
0 Stars     30 Views
User:
User Image P HYAREEN LINDA MBT19CS092

Verifying Basic Gates

AND OR NOT NOR NAND XOR XNOR
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project.name
0 Stars     34 Views
User:
User Image Varun Ajith Sivaram

Verifying Basic Gates

AND OR NOT NAND NOR XOR XNOR
View

Verification of basic gates

project.name
0 Stars     31 Views
User:
User Image MBT19CS119 VAISAKH R S

Verifying basic gates

AND NAND OR NOR NOT XOR XNOR
View

Representation of 7 logic gates.

project.name
0 Stars     38 Views
User:
User Image Ralf Banning

Simple Logic Gates

Logic Gates NOT OR AND XOR
View

Basic logic gates. Demonstrator for basic lectures on business information systems

project.name
0 Stars     21 Views
User:
User Image Humberto Honda

1Projeto

OR gate portas
View

Meu primeiro projeto no CV

project.name
0 Stars     23 Views
User:
User Image YASHWANTH KRISHNAN B

LOGIC GATES

AND OR NOT NAND NOR
View
project.name
0 Stars     18 Views
User:
User Image Vivek Kumar

Verification of gates

AND NOT OR NAND NOR XOR
View

verification of truth table

project.name
0 Stars     20 Views
User:
User Image RAJ KUMAR

Al gates verify

AND OR NOR NAND NOT
View
project.name
1 Stars     19 Views
User:
User Image Cleiber

Função majoritária

AND OR
View

Função majoritária utilizando portas AND e OR

project.name
0 Stars     24 Views
User:
User Image chiranjeevi

logic gates

NOT AND OR XOR NAND NOR XNOR Gates
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project.name
0 Stars     23 Views
User:
User Image Cleiber

Somador Completo

AND OR XOR
View

Somador completo para somar 1 bit.

project.name
0 Stars     23 Views
User:
User Image BALAMURUGAN J CSEUG-2020

Logic Gates

AND OR NOT NOR XOR XNOR
View
project.name
0 Stars     34 Views
User:
User Image Umesh

Experiment 1

AND OR NOT NAND NOR XOR XNOR
View

project.name
0 Stars     30 Views
User:
User Image Anshuman Srivastava

Basic Logic Gates

Gates AND OR NOT XOR NAND NOR XNOR
View

Basic circuits of all gates

project.name
0 Stars     7 Views
User:
User Image Hilda

24/08/21

AND OR GATES
View
project.name
0 Stars     34 Views
User:
User Image SHIVANAND JHA

Basic Logic Gates

NOT AND OR NAND NOR XNOR XOR.
View
project.name
0 Stars     18 Views
User:
User Image 2060655_Gaurav singh

Experiment 1

Q1:- Realize the truth table for AND OR NOT NAND NOR EXOR Q2:- Obtain the output for y=(AB+C)'+(A'+B'+C')
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project.name
0 Stars     20 Views
User:
User Image Dharmik Soni

practical 1

AND OR NOT GATE
View

3 INPUT PRACTICAL

project.name
0 Stars     16 Views
User:
User Image Ayushi Bhatla

Practical 1

AND OR NOT
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project.name
0 Stars     5 Views
User:
User Image Dr.Mayank Sharma

Firstorgate

OR AND
View
project.name
0 Stars     14 Views
User:
User Image KRISHNAPRIYA M S

EXPERIMENT:1

LOGIC GATES [NOT AND OR NOR NAND EX-OR]
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project.name
0 Stars     34 Views
User:
User Image soumyanetra Chakraborty 43

LOGIC

AND OR NOT NAND NOR XOR XNOR
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project.name
0 Stars     31 Views
User:
User Image soumyanetra Chakraborty 43

LOGIC

AND OR NOT NAND NOR XOR XNOR
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project.name
0 Stars     14 Views
User:
User Image shanoon m

EXPERIMENT 1

LOGIC GATES[NOT OR NOR NAND EX-OR]
View

SREELAKSHMI M

project.name
1 Stars     15 Views
User:
User Image shanoon m

EXPERIMENT 1

LOGIC GATES[NOT OR NOR NAND EX-OR]
View

Sreelakshmi M

project.name
1 Stars     12 Views
User:
User Image shanoon m

EXPERIMENT 1

LOGIC GATES[NOT OR NOR NAND EX-OR]
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project.name
0 Stars     14 Views
User:
User Image shanoon m

EXPERIMENT 1

LOGIC GATES[NOT OR NOR NAND EX-OR]
View
project.name
0 Stars     12 Views
User:
User Image shanoon m

EXPERIMENT 1

LOGIC GATES[NOT OR NOR NAND EX-OR]
View
project.name
0 Stars     12 Views
User:
User Image shanoon m

EXPT NO 2

LOGIC GATES[NOT OR NOR NAND EX-OR]
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project.name
0 Stars     15 Views
User:
User Image Himanshu Mishra

first

AND OR NOT NAND NOR XOR XNOR
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project.name
0 Stars     18 Views
User:
User Image AnupamSingh_30042

Exp1

AND OR NOT XOR XNOR NAND NOR
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project.name
0 Stars     17 Views
User:
User Image Ayush Raj

Logic Gates

AND OR NOT NOR NAND XOR XNOR
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project.name
0 Stars     26 Views
User:
User Image Fiza0069

CIRCUIT DIAGRAM

AND OR NOT NAND NOR XOR XNOR
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project.name
0 Stars     18 Views
User:
User Image Mahima

GATES

AND OR NOR NAND XOR XNOR NOT
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project.name
0 Stars     3 Views
User:
User Image Uzma

Experiment 4

To Design and verify the AND OR NOT using NOR gate only.
View
project.name
0 Stars     27 Views
User:
User Image Kshitij Goyal

Gates

OR AND NOT NOR NAND XOR XNOR
View

OR,AND,NOT,NOR,NAND,XOR,XNOR

project.name
0 Stars     16 Views
User:
User Image GURAMPATI SRINIVASULUREDDY

GATES

AND OR NOT NAND NOR XOR
View
project.name
0 Stars     15 Views
User:
User Image Seethal S

Familiarization of gates

AND OR NOT NOR NAND XOR XNOR
View
project.name
0 Stars     15 Views
User:
User Image Amit Kumar

NAND GATES

NOT AND OR NOR XOR XNOR
View

NAND GATE AS A UNIVERSAL GATE

project.name
0 Stars     15 Views
User:
User Image Amit Kumar

NOR GATE

NOT OR NAND NOR XOR XNOR
View

NOR GATE AS UNIVERSAL GATE

project.name
0 Stars     13 Views
User:
User Image 19_ANN MARY BABU

REALIZATION OF BASIC GATES

To realize the basic gates AND OR NOT using NANG gates only
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project.name
0 Stars     15 Views
User:
User Image Shubham Dubey

halfAdder

Xor OR
View

Half adder gate

project.name
0 Stars     28 Views
User:
User Image Pritam K.

EXPERIMENT 1A

Basic Gates Universal Gates NAND NOT OR AND
View

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND

project.name
0 Stars     26 Views
User:
User Image Pritam K.

EXPERIMENT 1A ii

Basic Gates Universal Gates NOR NOT OR AND
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Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NOR

project.name
0 Stars     20 Views
User:
User Image Abhishek Mishra

BasicGates

AND OR NOT
View

My first practice on Basic gates(AND,OR,NOT).

project.name
0 Stars     12 Views
User:
User Image Florence Ighravwe

Logic gates

AND NAND OR NOR NOT XOR XNOR
View

These are logic gates

project.name
1 Stars     8 Views
User:
User Image Michael Franata

Logic Gate Example

AND OR NOT
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project.name
0 Stars     5 Views
User:
User Image Wan Yi Zhi

Lab 1

OR NAND XOR XNOR
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project.name
0 Stars     19 Views
User:
User Image BT20ECE090_SHAIKRAFEE

GATES_TRUTH_TABLE

AND OR NOR XOR XNOR GATES
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project.name
1 Stars     3 Views
User:
User Image ME-A VIVEK Lohar

AND-OR-NOT_VIVEKLOHAR

AND OR NOT
View

SLRTCE IE subject practical no.1

project.name
0 Stars     15 Views
User:
User Image Kalea Morris

Circuts Homework 1-6

XOR AND OR NOT
View

Correctly recreated the following circuits within your circuitverse.com account, then use the circuits you recreated to complete the following truth tables.

project.name
0 Stars     1 Views
User:
User Image Tushar Kumar

B20AI048_Scratch_XOR

XOR using AND NOT OR
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project.name
0 Stars     10 Views
User:
User Image Vinicius Antunes

Exemplos de portas lógicas

Exemplo Portas AND OR NAND NOR
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project.name
0 Stars     12 Views
User:
User Image Fernando Silva

Portas Lógicas

Portas Lógicas AND OR NAND e NOR
View

Portas lógicas principais.

project.name
0 Stars     4 Views
User:
User Image Saransh Bhikhta

4 Bit ALU system

for sum OR XOR AND
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project.name
0 Stars     46 Views
User:
User Image Pritam K.

1-BIT ALU CIRCUIT

Basic Gates ALU AND OR NOR XOR 4:1 Multiplexer
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Simple Arithmetic Logic Unit

project.name
0 Stars     8 Views
User:
User Image Sebastian Valencia Zapata

NOT, AND y OR a NAND

NAND NOT AND OR
View

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

  • Natalia Andrea Álvarez Hoyos
  • Jean Carlo Montoya Castro
  • Sebastián Valencia Zapata
  • Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.

project.name
0 Stars     8 Views
User:
User Image Nikita Mishra

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

AND OR NOT NAND NOR GATES
View
project.name
0 Stars     1 Views
User:
User Image Pranjali Singh

Basic gates using universal gates

NAND NOR OR AND NOT
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project.name
0 Stars     1 Views
User:
User Image Shesansu Sekhar Behera

Combinational Circuits

AND OR
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project.name
0 Stars     1 Views
User:
User Image Riya Roy

Riya_Roy_it2021004

AND XOR OR
View
project.name
0 Stars     5 Views
User:
User Image KAIF SHAHEEM J

3-input Logic gates

AND OR NAND NOR XOR XNOR
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project.name
0 Stars     2 Views
User:
User Image Prathaksana

Untitled

AND OR
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project.name
0 Stars     2 Views
User:
User Image Prathaksana

2

AND OR
View
project.name
0 Stars     6 Views
User:
User Image PRATHAKSANA

PROJECT 4

XOR AND OR NOT
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project.name
0 Stars     5 Views
User:
User Image Mohana Priya J

PROJECT

EX-OR AND OR NOT
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project.name
0 Stars     7 Views
User:
User Image Mohana Priya J

FULL ADDER AND SUBRACTOR

AND EX-OR OR NOT
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project.name
0 Stars     7 Views
User:
User Image Mohana Priya J

Untitled

AND OR NOT
View
project.name
0 Stars     6 Views
User:
User Image PRATHAKSANA

MULTIPLEXER

AND OR NOT
View
project.name
0 Stars     3 Views
User:
User Image DISHANT SHARMA

BASIC GATES

AND OR NOT GATES
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project.name
0 Stars     6 Views
User:
User Image Mohana Priya J

MULTIPLEXER

AND OR NOT
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project.name
0 Stars     1 Views
User:
User Image Akrom Abdulvokhidov

Basic Logic Gates

AND OR NOT NAND NOR
View

Basic Logic Gates Simulating online

project.name
0 Stars     1 Views
User:
User Image Akrom Abdulvokhidov

Multiplexer (Selector)

AND OR Multiplexer Circuit
View
project.name
0 Stars     7 Views
User:
User Image aleksander sienkiewicz

CP220 Lab 2a, 2b 23/9/2022 Automatic Door Circuit

cp220 2022 september 2022 year 2 2nd year aleksander sienkiewicz Automatic Door Circuit NOT AND OR GATE
View

Little circuit for auto door, 3 inputs, 1 output

NOT gate, AND gate (x2), OR gate

project.name
0 Stars     2 Views
User:
User Image Basant Yahya

The main gates

[NOT AND OR NAND NOR XOR XNOR)
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project.name
0 Stars     1 Views
User:
User Image Basant Yahya

simple encoder

OR NOT. AND
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project.name
0 Stars     1 Views
User:
User Image Basant Yahya

Full-Adder using half-Adder

XOR AND OR
View
project.name
0 Stars     1 Views
User:
User Image Basant Yahya

Full-Adder using Half-Adder blocks

Half-Adder block OR
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project.name
0 Stars     1 Views
User:
User Image AnkushKumarVerma

LOGIC GATES

AND OR NOT XOR NAND NOR XNOR
View

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.

project.name
0 Stars     2 Views
User:
User Image Ayush Kukreti

Logic Gates

AND OR NOT NOR NAND EX-OR EX-NOR
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project.name
0 Stars     3 Views
User:
User Image Akarsh Mishra

OR Gate

OR Gate
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project.name
0 Stars     3 Views
User:
User Image Yash Shrivastava

OR Gate-Basic Gate

OR OR GATE BASIC GATE
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project.name
0 Stars     2 Views
User:
User Image GAURAV KUMAR

LAB ASSIGNMENT 1

QUESTION 1 PROVE OF AND OR NOT GATE
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project.name
0 Stars     2 Views
User:
User Image Karel Soběhart

OR gate

OR
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project.name
1 Stars     7 Views
User:
User Image ArithmeticArthur

Hex ALU V2 fixed

ALU cool fun hex hexadecimal binary comparator OR NOT XOR adder 8 bit ALU flags 8 bits 8 Subtractor
View

This is a Hexadecimal ALU with 6 status flags!

UF and OF are underflow and overflow respectivly 

project.name
0 Stars     2 Views
User:
User Image Dorian McIntire

ANDOR

AND OR
View

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