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Implementation of a Full Subtractor using MUX IC 4539B

Multiplexer implementation for the question

Q.1  Implement the boolean expression F(A, B, C) = ∑ m(0,2, 3, 5, 6) using a multiplexer.

NOTHING

Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and single output line. One of these data inputs will be connected to the output based on the values of selection lines.

Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros and ones. So, each combination will select only one data input. Multiplexer is also called as Mux.

4x1 Multiplexer

4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and one output Y. The block diagram of 4x1 Multiplexer is shown in the following figure.

One of these 4 inputs will be connected to the output based on the combination of inputs present at these two selection lines. Truth table of 4x1 Multiplexer is shown below.

TRUTH TABLE

Selection LinesOutputS1S0Y00I001I110I211I3

From Truth table, we can directly write the Boolean function for output, Y as

Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3

We can implement this Boolean function using Inverters, AND gates & OR gate. The circuit diagram of 4x1 multiplexer is shown in the following figure.

CIRCUIT DAIGRAM

8x1 Multiplexer

In the 8 to 1 multiplexer, there are total eight inputs, i.e., A₀, A₁, A₂, A₃, A₄, A₅, A₆, and A₇, 3 selection lines, i.e., S₀, S₁and S₂ and single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S⁰, S^1, and S₂, one of these 8 inputs are connected to the output.

Let the 8x1 Multiplexer has eight data inputs I7 to I0, three selection lines s2, s1 & s0 and one output Y. The Truth table of 8x1 Multiplexer is shown below.

 BLOCK DIAGRAM

AISH

AISH

An 8x1 multiplexer is a digital switch that selects one of eight input signals and forwards it to a single output based on a 3-bit selection input.