Searched Projects

Tags: A

project.name
0 Stars     94 Views
User:

punto 1

punto 1
M N1 N2 N3 A B

UN TANQUE CON TRES SENSORES N1, N2, N3 DE LLENADO, NECESITA EL DISEÑO DE UN CIRCUITO PARA SU EXCELENTE FUNCIONAMIENTO Y DESEMPEÑO PARA ESTO EL CLIENTE PIDE UN PAR DE MECANISMO PARA QUE EL DISPOSITIVO FUNCIONE COMO EL TIENE PREVISTO PRIMERO EL QUIERE QUE LA BOMBA TENGA UN ENCENDIDO Y APAGADO AUTOMÁTICO A TRAVÉS DEL CIRCUITO Y ESTO SE DARÁ CUANDO LOS SENSORES INFORMEN SI YA PASO O NO EL NIVEL DE ELLOS DE TAL MANERA QUE MAS SINTETIZADO SU FUNCIONAMIENTO ENCENDERA TANTO LA BOMBA COMO LA ALARMA SI: EL TANQUE ESTA TOTALMENTE VACIO LA ALARMA SE ENCENCERA INDICANDOLE AL USUARIO QUE  HAY QUE LLENAR EL TANQUE, LA BOMBA SE ENCENDERA SI EL NIVEL DEL AGUA ESTA POR ENCIMA DE N1 Y DEBAJO DE N2 AL IGUAL QUE SI ESTA POR ENCIMA DE N1 Y N2 PERO POR DEBAJO DE N3 ESTO YA QUE EL TANQUE NO SE HA LLENADO COMPLETAMENTE Y LA ALARMA SE VOLVERA A ENCENDER CUANDO EL NIVEL DEL AGUA SEA MAYOR A LA UBICACION DE N1, N2 Y N3  DE TAL MANERA QUE EL USUARIO APAGE LA LLAVE QUE PERMITE QUE LA BOMBA SE ENCIENDA.


project.name
0 Stars     46 Views
User:

Untitled

Untitled
A

project.name
0 Stars     95 Views
User:

SVM

SVM
A B C D

project.name
0 Stars     36 Views

PRACTICA4

PRACTICA4
A

NA


project.name
0 Stars     40 Views
User:

parity

parity
A B

Parity


project.name
0 Stars     40 Views
User:

2.3

2.3
A B C

project.name
0 Stars     70 Views

EXPERIMENT 1 A

EXPERIMENT 1 A

project.name
0 Stars     82 Views

verfication of truth table of all gates

verfication of truth table of all gates
M A N D R

project.name
0 Stars     64 Views

verification of de morgan law

verification of de morgan law
L A B 2

project.name
0 Stars     60 Views

4 bit shift bidirectional circuit

4 bit shift bidirectional circuit
L A B 12

project.name
0 Stars     61 Views

T & D flip flops using JK flip flops

T & D flip flops using JK flip flops
L A B 11

project.name
0 Stars     65 Views

verfiy J-K flip flop and implement master Slave condition using JK Flip Flop

verfiy J-K flip flop and implement master Slave condition using JK Flip Flop
L A B 10

project.name
0 Stars     52 Views

Subtracter circuit

Subtracter circuit
L A B 9

project.name
0 Stars     68 Views

3:8 decoder

3:8 decoder
L A B 8

project.name
0 Stars     110 Views

Hamming Codes

Hamming Codes
A

WIP, A hardware implimentation of the HAMMING CODE error correction algorithm



project.name
0 Stars     52 Views

Full adder

Full adder

project.name
0 Stars     15 Views
User:

B

B
A

project.name
0 Stars     43 Views
User:

half subtractor

half subtractor
A B Bin

project.name
0 Stars     35 Views
User:

Half subtractor

Half subtractor
A B Bin

project.name
0 Stars     24 Views
User:

half adder

half adder
A B Bin

project.name
0 Stars     30 Views
User:

half subtractor

half subtractor
A B Bin

project.name
0 Stars     48 Views

Half Adder

Half Adder

Half Adder 


project.name
0 Stars     16 Views
User:

CIRCUIT

CIRCUIT
A

project.name
0 Stars     27 Views
User:

Half subtractor

Half subtractor
A B Bin

project.name
0 Stars     89 Views

7 segment logic circuits

7 segment logic circuits
A B C D

project.name
0 Stars     9 Views

M1A1

M1A1
A

Jiji


project.name
0 Stars     45 Views
User:

7 SEGMENT

7 SEGMENT
A B C D

PROJECT FOR LCD


project.name
0 Stars     31 Views

Circuito1/2/3

Circuito1/2/3
A B C OUT

project.name
0 Stars     11 Views

Laboratorio 1

Laboratorio 1
A

project.name
0 Stars     25 Views
User:
User Image Kim

Hiển thị đèn a

Hiển thị đèn a
A

Hiển thị đèn bản chữ cái


project.name
0 Stars     9 Views
User:
User Image VAL

VAL DAMAS AND IVY MAE SARAUSAD

VAL DAMAS AND IVY MAE SARAUSAD
A

project.name
0 Stars     20 Views

ALU Demonstration

ALU Demonstration
A K V

project.name
0 Stars     12 Views
User:

AND GATE

AND GATE
A B

Here we take 2 input and we get 1 output

if

0 0=0

0 1=0

1 0=0

1 1=1


project.name
0 Stars     19 Views
User:

AND GATE

AND GATE
A B

In this gate when both the inputs are on, it will give the output on.


project.name
0 Stars     22 Views
User:

OR GATE

OR GATE
A B

In OR gate when either of the input is 1 it will give the output 1 i.e.

0+1=1

1+0=1

1+1=1


project.name
0 Stars     11 Views
User:

OR GATE

OR GATE
A B

2 input

1 output

0 0=1

0 1=1

1 0=1

1 1=1


project.name
0 Stars     21 Views
User:

NOT GATE

NOT GATE
A A'

In NOT Gate when input is 1 it will give output 0 and when input is 0 it will give 1. 


project.name
0 Stars     8 Views
User:

NOT GATE

NOT GATE
A

1 INPUT

1 OUTPUT

0=1

1=0


project.name
0 Stars     10 Views
User:

XOR GATE

XOR GATE
A B

2 INPUT

1 OUTPUT

0 0=0

0 1=1

1 0=1

1 1=0


project.name
0 Stars     21 Views
User:

XOR GATE

XOR GATE
A B

In XOR when both the inputs are 1 or 0 it will give the output 0 i.e

0+0=0

0+1=1

1+0=1

1+1=0


project.name
0 Stars     8 Views
User:

NAND GATE

NAND GATE
A B

2 INPUT

1 OUTPUT

0 0=1

0 1=1

1 0=1

1 1=0


project.name
0 Stars     12 Views
User:

NOR GATE

NOR GATE
A B

2 INPUT

1 OUTPUT

0 0=1

0 1=0

1 0=0

1 1=0


project.name
0 Stars     19 Views
User:

NAND GATE

NAND GATE
A B

In NAND Gate

0+0=1

0+1=1

1+1=0

1+0=1


project.name
0 Stars     9 Views
User:

XNOR GATE

XNOR GATE
A B

2 INPUT

1 OUTPUT

0 0=1

0 1=0

1 0=0

1 1=1


project.name
0 Stars     5 Views

Gates

Gates
A B

project.name
0 Stars     18 Views
User:

XNOR GATE

XNOR GATE
A B

In XOR when both the inputs are 1 or 0 it will give the output 1 i.e,

0+0=1

1+1=1


project.name
0 Stars     11 Views
User:

Half adder

Half adder
A B

Here sum and carry is their

A B S C

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1


project.name
0 Stars     27 Views
User:

Half Adder Circuit

Half Adder Circuit
A B S C

Half Adder Truth Table:

A      B       Sum    Carry

0       0       0          0

0       1        1           0

1        0        1           0

1         1        0          1


project.name
0 Stars     34 Views
User:

Full Adder

Full Adder

Truth Table of Full Adder:

A   B   Cin  Sum Cout

0    0    0      0     0

0    0    1      1      0

0    1     0    1       0 

0    1     1     0     1

1     0     0   1      0

1    0      1    0     1

1      1    0    0     1

1     1     1    1      1


project.name
0 Stars     18 Views
User:

NOR GATE

NOR GATE
A B

In this gate when both the input are 0 it will give 1 otherwise 0 i.e,

0+0=1

0+1=0

1+0=0

1+1=0


project.name
0 Stars     24 Views
User:

FULL ADDER SUM

FULL ADDER SUM
A B S

T.T:

A  B   Cin   S

0   0   0     0

0   0   1      1

0   1    0     1

0   1   1      0

1    0   0     1

1   0   1      0

1    1   0     0

1   1    1      1


project.name
0 Stars     31 Views
User:

HALF SUBTRACTOR

HALF SUBTRACTOR
A B S C

Truth Table:

A    B      S    C

0    0      0    0

0   1       1     1

1   0       1     0

1   1       0    0


project.name
0 Stars     47 Views
User:

BCD to 7 segment display

BCD to 7 segment display
A B C D a b c d e f g

BCD to 7 segment display


project.name
0 Stars     8 Views
User:

AND Gate

AND Gate
A B

AND gate will give output only when both the inputs are on.

Truth Table:

A   B   A.B

0   0    0

0   1     0

1   0     0

1   1     1


project.name
0 Stars     14 Views

EZ 000

EZ 000
A

AA


project.name
0 Stars     23 Views
User:

Decryption

Decryption
A B C D

project.name
0 Stars     12 Views

Circuitos

Circuitos
A B C

project.name
0 Stars     15 Views

7SEGMENT

7SEGMENT
A B C D

project.name
0 Stars     15 Views

7segment

7segment
A B C D

project.name
0 Stars     39 Views

CABANERO AND VELARDE

CABANERO AND VELARDE
L o u S A 2 3

project.name
0 Stars     35 Views

Marjun J. Castañares

Marjun J. Castañares
C H A r g E S 9

project.name
0 Stars     8 Views
User:

1

1
A

project.name
0 Stars     15 Views

PUNTO 1

PUNTO 1
A B C F1 F2

project.name
0 Stars     6 Views

Transferencia trifasica

Transferencia trifasica
A B C

project.name
0 Stars     14 Views

Transferencia trifasica.

Transferencia trifasica.
A B C

project.name
0 Stars     13 Views

Punto 4

Punto 4
A B C X

project.name
0 Stars     13 Views

Untitled

Untitled
A B C X

project.name
0 Stars     14 Views

Punto 7

Punto 7
A B C X

project.name
0 Stars     13 Views

Untitled

Untitled
A B C X

project.name
0 Stars     9 Views

PUNTO1

PUNTO1
A B C

project.name
0 Stars     10 Views

PUNTO3

PUNTO3
A B C

project.name
0 Stars     15 Views

PUNTO4

PUNTO4
A B C

project.name
0 Stars     15 Views

PUNTO7A

PUNTO7A
A B C

project.name
0 Stars     15 Views

PUNTO7E

PUNTO7E
A B C

project.name
0 Stars     6 Views

Untitled

Untitled
A B C

project.name
0 Stars     5 Views

MeuPrimeiroProjeto

MeuPrimeiroProjeto
A

project.name
0 Stars     15 Views

TALLER COMPENSACION PUNTO 1

TALLER COMPENSACION PUNTO 1
A B C D Z

project.name
1 Stars     9 Views

seven segment display

seven segment display
A B C D

project.name
0 Stars     5 Views

Nuevo

Nuevo
A

project.name
0 Stars     6 Views
User:

multiplexor1

multiplexor1

project.name
0 Stars     4 Views

EXPERIMENT 7

EXPERIMENT 7
A

project.name
0 Stars     3 Views
User:

Sumadr

Sumadr
A B S Cout