**Experiment No: 6a**. Implementation of 1x4 demultiplexer using basic gates.

Done by:

Saranga K. Mahanta

Scholar Id: 18-14-038

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:

[0] 000: OR

[1] 001: NAND

[2] 010:NOR

[3] 011: AND

Arithmetic Operations:

[4] 100: ADD

[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:

[0] 000: OR

[1] 001: NAND

[2] 010:NOR

[3] 011: AND

Arithmetic Operations:

[4] 100: ADD

[5] 101: SUB

The two's complement for subtraction uses the built in component.