project.name

Tejeswar Reddy Bana

Member since: 1 year

Educational Institution: Not Entered

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implemtation jk flip flop

implemtation jk flip flop
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Tejeswar Reddy

Tejeswar Reddy
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Half Adder

Half Adder
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Full Subtractor

Full Subtractor
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2 BIT HALF ADDER AND SUBTRACTOR

2 BIT HALF ADDER AND SUBTRACTOR
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3 BIT FULL ADDER

3 BIT FULL ADDER
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implementation of jk to D Flip Flop

implementation of jk to D Flip Flop
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MUX with 3 selects

MUX with 3 selects
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Basic Gates using Universal Gates

Basic Gates using Universal Gates
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3 BIT FULL SUBTRACTOR

3 BIT FULL SUBTRACTOR
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Untitled

Untitled
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MUX

MUX
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Flip Flop

Flip Flop
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K-map

K-map
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conversions of JK and D Flip Flop

conversions of JK and D Flip Flop
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Encoder and Decoder

Encoder and Decoder
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1-bit comparator

1-bit comparator
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2-Bit comparator

2-Bit comparator
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K-map(2)

K-map(2)
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DE-MUX

DE-MUX
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Tejeswar Reddy Bana is not a collaborator of any project.

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