project.name

Ujjwal Kar

Member since: 653 days

Educational Institution: Bengal Institute of Technology

Country: India

Full Adder and Subtractor using Half

Full Adder and Subtractor using Half
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Full Adder and Subtractor using Half
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ALU

ALU
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ALU
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Design and simulate a 4 input decrementer circuit.

Design and simulate a 4 input decrementer circuit.
Public
Design and simulate a 4 input decrementer circuit.
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Cascade two 4:1 Multiplexers to implement an 8:1 Mux.

Cascade two 4:1 Multiplexers to implement an 8:1 Mux.
Public
Cascade two 4:1 Multiplexers to implement an 8:1 Mux.
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ALU

ALU
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ALU
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Half Adder Half Subtractor

Half Adder Half Subtractor
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Half Adder Half Subtractor
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4 bit Adder-subtractor unit

4 bit Adder-subtractor unit
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4 bit Adder-subtractor unit
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Multiplexer

Multiplexer
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Multiplexer
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Untitled

Untitled
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Untitled
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BCD Adder

BCD Adder
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BCD Adder
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multx

multx
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multx
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HALF ADDER AND HALF SUBTRACTORR

HALF ADDER AND HALF SUBTRACTORR
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HALF ADDER AND HALF SUBTRACTORR
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ALU

ALU
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ALU
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Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic gates
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Design and Realiization of Basic Logic gates
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