Searched Projects

Tags: NOT

project.name
0 Stars     140 Views
User:

LED_NOT

LED_NOT
NOT
Here we have used NOT gate as circuit intermediate. one side of NOT gate is connected to the LED while the other side is connected to input device which gives different inputs and the result is seen on our LED.

project.name
0 Stars     89 Views

Basic Gates

Basic Gates

This is just a simple project to get some practice with CircuitVerse and simple gates such as AND, OR, NOT.


project.name
0 Stars     66 Views

57838_πειραματική διάταξη με πύλες NOT,AND,OR

57838_πειραματική διάταξη με πύλες NOT,AND,OR

project.name
0 Stars     70 Views

57838_πειραματικη διάταξη με πυλές NOT,AND,OR απλοποιημένη

57838_πειραματικη διάταξη με πυλές NOT,AND,OR απλοποιημένη

project.name
0 Stars     77 Views

57838_ημιαθροιστης με πύλες XOR,NAND,NOT

57838_ημιαθροιστης με πύλες XOR,NAND,NOT

project.name
0 Stars     61 Views
User:

COMPUERTAS

COMPUERTAS

project.name
0 Stars     88 Views

Experiment-1

Experiment-1

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR


project.name
0 Stars     66 Views
User:

EXP-1 SAHIL JAIN

EXP-1 SAHIL JAIN

project.name
0 Stars     72 Views

GATES

GATES

project.name
0 Stars     62 Views

logic gates

logic gates

project.name
0 Stars     57 Views

project.name
0 Stars     65 Views
User:

Basic Logic Gates

Basic Logic Gates

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,


project.name
0 Stars     71 Views
User:

Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic gates

Design and Realiization of Basic Logic Gates


Name :- Ujjwal Kar

Roll No. :- 12100119047
Dept. :- CSE (A)



project.name
0 Stars     57 Views

LOGIC GATES

LOGIC GATES

project.name
1 Stars     63 Views
User:

Creating OR gate from AND gate and NOT gate

Creating OR gate from AND gate and NOT gate

I have used a NOT gate and an AND gate to create an OR gate.


project.name
0 Stars     67 Views
User:

XOR GATE from AND, NOT, OR gate

XOR GATE from AND, NOT, OR gate

I used an AND, NOT and OR gates to create an XOR gate


project.name
0 Stars     48 Views
User:

Logic gates

Logic gates

project.name
0 Stars     48 Views

Untitled

Untitled

(A'+B')(A(B+C'))'+A(B'+C')


project.name
0 Stars     70 Views
User:

FAMILIRIZATION OF LOGIC GATES

FAMILIRIZATION OF LOGIC GATES

project.name
0 Stars     61 Views

FAMILIARISATION OF CIRCUITS

FAMILIARISATION OF CIRCUITS

Result: Familiarisation with logic gates through virtual lab successfully completed.


project.name
0 Stars     76 Views

HALF AND FULL ADDER

HALF AND FULL ADDER

Successfully completed half and full adder using gates and universal gates.


project.name
0 Stars     65 Views

experiment one

experiment one

lab experiment 



project.name
0 Stars     67 Views

lOGIC GATES

lOGIC GATES

project.name
1 Stars     55 Views

circuito not

circuito not
NOT

NOT, ejemplos basicos


project.name
0 Stars     58 Views

exp 1

exp 1

project.name
0 Stars     66 Views

GATES

GATES

project.name
0 Stars     61 Views
User:

LOGIC GATES

LOGIC GATES

AND GATE:-A*B

OR GATE:-A+B

NOT GATE:-A`

NAND GATE:-(A*B)`

NOR GATE:-(A+B)`

XOR GATE:-A^B  i.e. , A`B+AB`

XNOR GATE:-(A^B)` i.e. , AB+A`B`










project.name
0 Stars     65 Views
User:

Logic GATES

Logic GATES

project.name
0 Stars     84 Views
User:

From NAND to Tetris Ch.1

From NAND to Tetris Ch.1

project.name
0 Stars     32 Views

Untitled

Untitled
NOT

Example NOT Gate


project.name
0 Stars     69 Views

Experiment-1(Basic Gates)

Experiment-1(Basic Gates)

Introduction to logic gates and it's verification with truth table.


project.name
0 Stars     91 Views

project.name
0 Stars     59 Views

EXPERIMENT 1 A

EXPERIMENT 1 A

project.name
0 Stars     30 Views
User:

Gates

Gates

Puertas Logicas


project.name
0 Stars     59 Views

Verifying basic Gates

Verifying basic Gates

Verifying the truth tables of Basic and Universal Gates


project.name
0 Stars     45 Views

Verifying Basic Gates

Verifying Basic Gates

project.name
0 Stars     57 Views

Verifying Basic Gates

Verifying Basic Gates

Verification of basic gates


project.name
0 Stars     54 Views

Verifying basic gates

Verifying basic gates

Representation of 7 logic gates.


project.name
0 Stars     66 Views
User:

Simple Logic Gates

Simple Logic Gates

Basic logic gates. Demonstrator for basic lectures on business information systems


project.name
0 Stars     42 Views

LOGIC GATES

LOGIC GATES

project.name
0 Stars     35 Views
User:

Verification of gates

Verification of gates

verification of truth table


project.name
0 Stars     36 Views
User:

Al gates verify

Al gates verify

project.name
0 Stars     42 Views
User:

logic gates

logic gates

project.name
0 Stars     48 Views

Logic Gates

Logic Gates

project.name
0 Stars     63 Views
User:

Experiment 1

Experiment 1


project.name
0 Stars     60 Views

Basic Logic Gates

Basic Logic Gates

Basic circuits of all gates


project.name
0 Stars     49 Views

Basic Logic Gates

Basic Logic Gates

project.name
0 Stars     38 Views

project.name
0 Stars     28 Views

Practical 1

Practical 1

project.name
0 Stars     62 Views

LOGIC

LOGIC

project.name
0 Stars     59 Views

LOGIC

LOGIC

project.name
0 Stars     35 Views

first

first

project.name
0 Stars     43 Views

Exp1

Exp1

project.name
0 Stars     36 Views
User:

Logic Gates

Logic Gates

project.name
0 Stars     47 Views

Project 2 : 30/09/2021

Project 2 : 30/09/2021

project.name
0 Stars     56 Views
User:

CIRCUIT DIAGRAM

CIRCUIT DIAGRAM

project.name
0 Stars     38 Views
User:

GATES

GATES

project.name
0 Stars     85 Views

Gates

Gates

OR,AND,NOT,NOR,NAND,XOR,XNOR


project.name
0 Stars     42 Views

GATES

GATES

project.name
0 Stars     41 Views
User:

Familiarization of gates

Familiarization of gates

project.name
0 Stars     35 Views
User:

NAND GATES

NAND GATES

NAND GATE AS A UNIVERSAL GATE


project.name
0 Stars     40 Views
User:

NOR GATE

NOR GATE

NOR GATE AS UNIVERSAL GATE


project.name
0 Stars     28 Views

REALIZATION OF BASIC GATES

REALIZATION OF BASIC GATES

project.name
0 Stars     89 Views
User:

EXPERIMENT 1A

EXPERIMENT 1A

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND


project.name
0 Stars     59 Views
User:

EXPERIMENT 1A ii

EXPERIMENT 1A ii

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NOR


project.name
0 Stars     35 Views

BasicGates

BasicGates

My first practice on Basic gates(AND,OR,NOT).


project.name
0 Stars     33 Views

Logic gates

Logic gates

These are logic gates


project.name
0 Stars     59 Views

Half Substractor

Half Substractor

project.name
1 Stars     22 Views

Logic Gate Example

Logic Gate Example

project.name
0 Stars     12 Views

NAND Implementation

NAND Implementation

Implemented NAND


project.name
1 Stars     12 Views

AND-OR-NOT_VIVEKLOHAR

AND-OR-NOT_VIVEKLOHAR

SLRTCE IE subject practical no.1


project.name
0 Stars     42 Views
User:

Circuts Homework 1-6

Circuts Homework 1-6

Correctly recreated the following circuits within your circuitverse.com account, then use the circuits you recreated to complete the following truth tables.


project.name
0 Stars     10 Views
User:

B20AI048_Scratch_XOR

B20AI048_Scratch_XOR

project.name
0 Stars     26 Views

NOT, AND y OR a NAND

NOT, AND y OR a NAND

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

  • Natalia Andrea Álvarez Hoyos
  • Jean Carlo Montoya Castro
  • Sebastián Valencia Zapata
  • Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.


project.name
0 Stars     23 Views

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

ASSIGNMENT-1,NAND AND NOR GATES AS UNIVERSAL GATES

project.name
1 Stars     14 Views

Basic gates using universal gates

Basic gates using universal gates

project.name
0 Stars     28 Views
User:

PROJECT 4

PROJECT 4

project.name
0 Stars     29 Views

PROJECT

PROJECT

project.name
0 Stars     44 Views

HALF ADDER AND SUBRACTOR

HALF ADDER AND SUBRACTOR

project.name
0 Stars     24 Views

FULL ADDER AND SUBRACTOR

FULL ADDER AND SUBRACTOR

project.name
0 Stars     26 Views

Untitled

Untitled

project.name
0 Stars     28 Views
User:

MULTIPLEXER

MULTIPLEXER

project.name
0 Stars     26 Views

MULTIPLEXER

MULTIPLEXER

project.name
0 Stars     17 Views

DEMULTIPLEXER

DEMULTIPLEXER

project.name
0 Stars     17 Views
User:

EVEN PARITY GENERATORF

EVEN PARITY GENERATORF

project.name
0 Stars     26 Views

PARITY GENERATOR AND CHECKER

PARITY GENERATOR AND CHECKER

project.name
0 Stars     18 Views

PARITY GENERATOR AND CHECKER

PARITY GENERATOR AND CHECKER

project.name
0 Stars     12 Views

Basic Logic Gates

Basic Logic Gates

Basic Logic Gates Simulating online


project.name
1 Stars     43 Views

CP220 Lab 2a, 2b 23/9/2022 Automatic Door Circuit

CP220 Lab 2a, 2b 23/9/2022 Automatic Door Circuit

Little circuit for auto door, 3 inputs, 1 output

NOT gate, AND gate (x2), OR gate


project.name
0 Stars     14 Views

LOGIC GATES

LOGIC GATES

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.


project.name
0 Stars     30 Views

Logic Gates

Logic Gates

project.name
0 Stars     20 Views

NOT Gate

NOT Gate

project.name
0 Stars     24 Views

NOT GATE-Basic Gate

NOT GATE-Basic Gate

project.name
0 Stars     19 Views
User:

COA ( DESIGN AND IMPLEMENTATION OF NOT GATE )

COA ( DESIGN AND IMPLEMENTATION OF NOT GATE )

project.name
0 Stars     16 Views

NOT gate

NOT gate
NOT

project.name
2 Stars     78 Views

This is a Hexadecimal ALU with 6 status flags!

UF and OF are underflow and overflow respectivly 


project.name
0 Stars     18 Views
User:

Shivam Kumar /Roll no.51/Section A.

Shivam Kumar /Roll no.51/Section A.

project.name
0 Stars     16 Views
User:

XNOR Gate

XNOR Gate

project.name
0 Stars     11 Views
User:

NOT GATE Using NAND GATE

NOT GATE Using NAND GATE

project.name
0 Stars     15 Views

Basic Logic Gates

Basic Logic Gates

Fundamental logical functions are performed using basic logic gates. These are the fundamental components of integrated circuits.


project.name
0 Stars     13 Views

AND, ZOR and NOT Gate

AND, ZOR and NOT Gate

Gate Combination


project.name
0 Stars     15 Views

compuertas AND OR NOT

compuertas AND OR NOT

Éste es el ejercicio 1 de Laboratorio de Circuitos Digitales de la materia Tecnología de Computadores


project.name
0 Stars     13 Views

EXER1NAND

EXER1NAND

ÉSTE EJERCICIO ES GUARDADO PARA LA MATERIA DE TECNOLOGIA DE COMPUTADORES, SECCIÓN LABORATORIO.

INCISO1


project.name
0 Stars     15 Views

Gerbang Logika NOT

Gerbang Logika NOT

Gerbang Logika NOT ini berfungsi sebagai pembalik keadaan. Jika input bernilai 1 maka outputnya akan bernilai 0 dan begitu juga sebaliknya.

Berikut adalah simulasi gerbang logika dasar NOT :


project.name
0 Stars     12 Views
User:

prgm-1 basic logic gates (venkat)

prgm-1 basic logic gates (venkat)

project.name
0 Stars     13 Views
User:

Logic Gates

Logic Gates

project.name
0 Stars     15 Views

Tejeswar Reddy

Tejeswar Reddy

Completed 


project.name
0 Stars     10 Views
User:

1st Project

1st Project

Here is First Project ...Today dated 7-september-2023

Basic and Universal Gates


project.name
0 Stars     15 Views
User:

Lab 1 : To learn and verify the truth table of the different logic gates

Lab 1 : To learn and verify the truth table of the different logic gates

project.name
0 Stars     14 Views

Lab NO.1 : To learn study and verify the truth table of different logic gates

Lab NO.1 : To learn study and verify the truth table of different logic gates

project.name
0 Stars     11 Views

Basic Gates using Universal Gates

Basic Gates using Universal Gates

COMPLETED


project.name
0 Stars     11 Views

Half Adder

Half Adder

completed


project.name
0 Stars     12 Views
User:

Untitled

Untitled

project.name
0 Stars     12 Views
User:

COA project lab practical 1

COA project lab practical 1

project.name
0 Stars     15 Views
User:

basic logic gates

basic logic gates

project.name
0 Stars     13 Views
User:

Tushar Singh

Tushar Singh

project.name
0 Stars     7 Views
User:

ROBIN KUMAR MONDAL

ROBIN KUMAR MONDAL
NOT

project.name
0 Stars     7 Views
User:

Practicas

Practicas
NOT

NOT. Crea una simulació que implementi un inversor (NOT) utilitzant únicament portes NAND. El circuit ha de tenir un interruptor com a entrada (switch) i un LED com a sortida.


project.name
0 Stars     10 Views

K-map

K-map

COMPLETED



project.name
0 Stars     14 Views

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

AND,OR,NOT,NOR,NAND,XOR ,XNOR Gate

project.name
0 Stars     6 Views

BASIC LOGIC GATES

BASIC LOGIC GATES

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates.

What is logic gates coding?
In a circuit, logic gates will make decisions based on a combination of digital signals coming from its inputs. Most logic gates have two inputs and one output. Logic gates are based on Boolean algebra. At any given moment, every terminal is in one of the two binary conditions, false or true.

project.name
0 Stars     18 Views

All Types of Logic Gates

All Types of Logic Gates

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates. Drag from the hollow circles to the solid circles to make connections. Right click connections to delete them. See below for more detailed instructions.

Engineering Electronics Logic


project.name
0 Stars     12 Views

Untitled

Untitled

project.name
0 Stars     6 Views

lab2

lab2

project.name
0 Stars     4 Views
User:

Experiment 1 level 1

Experiment 1 level 1

Basic gates statements


project.name
0 Stars     6 Views

EXPERIMENT 1 LEVEL 1

EXPERIMENT 1 LEVEL 1

project.name
0 Stars     6 Views
User:

Experiment 1 Level 1

Experiment 1 Level 1

project.name
0 Stars     5 Views
User:

Experiment 1 Level 1

Experiment 1 Level 1

project.name
0 Stars     7 Views

Suchitra nilajagi

Suchitra nilajagi

project.name
0 Stars     5 Views
User:

Untitled

Untitled

project.name
0 Stars     5 Views
User:

Experiment lvl 2

Experiment lvl 2

project.name
0 Stars     7 Views

EXPERIMENT-01-LEVEL1

EXPERIMENT-01-LEVEL1

ABC


project.name
0 Stars     8 Views
User:

EXPERIMENT-01 (1)

EXPERIMENT-01 (1)

AISHWARYA M R


project.name
0 Stars     5 Views
User:

EXPERIMENT-1 LOGIC GATES

EXPERIMENT-1 LOGIC GATES

project.name
0 Stars     5 Views
User:

ALL GATES

ALL GATES

ALL GATES


project.name
0 Stars     7 Views
User:

exp 1

exp 1

project.name
0 Stars     6 Views
User:

EXPERIMENT 1 LEVEL 2

EXPERIMENT 1 LEVEL 2

LEVEL 2


project.name
0 Stars     5 Views
User:

EXPERIMENT 1 LEVEL2

EXPERIMENT 1 LEVEL2

project.name
0 Stars     6 Views
User:

EXPERIMENT 01

EXPERIMENT 01

BASIC GATES


project.name
0 Stars     6 Views
User:

BASIC GATES

BASIC GATES

project.name
0 Stars     6 Views
User:

IMPLIMENTATION OF LOGIC GATES USING UNIVERSAL GATES

IMPLIMENTATION OF LOGIC GATES USING UNIVERSAL GATES

project.name
0 Stars     6 Views
User:

NOR IMPLIMENTATION

NOR IMPLIMENTATION

project.name
0 Stars     4 Views
User:

EXP 1

EXP 1

1) TO VERIFY TRUTH TABLE OF ALL LOGIC GATES

2) TO DERIVE THE AND,OR,NOT,XOR,XNOR,NABD,&NOR  LOGIC USING UNIVERSAL GATES


project.name
0 Stars     3 Views

project 2

project 2

project


project.name
0 Stars     5 Views
User:

EXP NO-1

EXP NO-1

project.name
0 Stars     4 Views
User:

GATES

GATES

project.name
0 Stars     5 Views

EXP 2 - VERIFICATION OF BOOLEAN LAWS

EXP 2 - VERIFICATION OF BOOLEAN LAWS

LAWS


project.name
0 Stars     6 Views
User:

VERIFICATIOIN OF LOGIC GATES

VERIFICATIOIN OF LOGIC GATES

project.name
0 Stars     5 Views
User:

Untitled

Untitled

project.name
0 Stars     4 Views
User:

EXP 3 4:1 MUX

EXP 3 4:1 MUX

project.name
0 Stars     4 Views

EXP 01 LEVEL 1

EXP 01 LEVEL 1

project.name
0 Stars     6 Views

EXPERIMENT 3 - LEVEL 1 - DESIGN OF COMBINATIONAL CIRCUITS

EXPERIMENT 3 - LEVEL 1 - DESIGN OF COMBINATIONAL CIRCUITS

project.name
0 Stars     5 Views

EXPERIMENT 3 - LEVEL 2

EXPERIMENT 3 - LEVEL 2

project.name
0 Stars     7 Views
User:

design of combinational circuits

design of combinational circuits

project.name
0 Stars     4 Views
User:

EXP 5 LEVEL1

EXP 5 LEVEL1

project.name
0 Stars     6 Views
User:

EXPERIMENT 01--LEVEL 02

EXPERIMENT 01--LEVEL 02

USING NANAD & NOR GATES 

DERIVING ALL GATES


project.name
0 Stars     5 Views

Untitled

Untitled

1ST ASSINGMENT


project.name
0 Stars     4 Views

project.name
0 Stars     5 Views

project.name
1 Stars     1 Views
User:

basic circuits

basic circuits

project.name
0 Stars     7 Views

project.name
0 Stars     4 Views

Logic gates

Logic gates