Searched Projects

Tags: AND GATE

project.name
1 Stars     54 Views

Test

Test
My first Project

project.name
0 Stars     63 Views
User:

Untitled

Untitled

project.name
0 Stars     41 Views
User:

LOGIC GATES

LOGIC GATES

VERIFICATION OF THE THE TRUTH TABLE OF THE AND GATE


project.name
0 Stars     40 Views

AND GATE

AND GATE

project.name
0 Stars     43 Views

design a FA using HA

design a FA using HA

This experiment is regarding  full adder   using half adder.


project.name
0 Stars     36 Views

Basic Gate

Basic Gate

project.name
0 Stars     43 Views
User:

COMPUTER ARCHITECTURE LOGIC GATES

COMPUTER ARCHITECTURE LOGIC GATES

This is an AND GATE CIRCUIT.


project.name
0 Stars     57 Views

Verifying logic gates

Verifying logic gates

Verifying the some of the logic gates.


project.name
0 Stars     38 Views

VERIFYING BASIC GATES

VERIFYING BASIC GATES

project.name
0 Stars     60 Views

VERYFING BASIC GATES

VERYFING BASIC GATES

project.name
0 Stars     68 Views
User:

EX.NO:1 Implementation of Logic Gates

EX.NO:1 Implementation of Logic Gates

I have Completed the Ex.No-1 - Implementation of Logic Gates Sir.


project.name
0 Stars     51 Views

experiment no 1-not gate

experiment no 1-not gate

project.name
0 Stars     57 Views
User:

Experiment 1

Experiment 1

EXPERIMENT 1 FOR DIGITAL ELECTRONICS LAB


project.name
0 Stars     53 Views

Realization of Basic gates and Universal gates

Realization of Basic gates and Universal gates

project.name
0 Stars     40 Views

DEMO2

DEMO2

project.name
0 Stars     23 Views

AND GATE

AND GATE

project.name
0 Stars     40 Views

Alarm circuit

Alarm circuit

Demonstration of burglar alarm circuit using AND gate


project.name
0 Stars     31 Views

8 INPUT AND GATE

8 INPUT AND GATE

project.name
0 Stars     19 Views

ONE

ONE

project.name
0 Stars     35 Views

ADITI VARSHNEY

ADITI VARSHNEY

project.name
0 Stars     33 Views
User:

AND GATE

AND GATE

project.name
0 Stars     37 Views

AND-Basic Gate

AND-Basic Gate

project.name
0 Stars     36 Views
User:

project.name
0 Stars     23 Views

Sachin Kumar Yadav

Sachin Kumar Yadav

{"layout":{"width":100,"height":180,"title_x":50,"title_y":13,"titleEnabled":true},"verilogMetadata":{"isVerilogCircuit":false,"isMainCircuit":false,"code":"// Write Some Verilog Code Here!","subCircuitScopeIds":[]},"allNodes":[{"x":-10,"y":-10,"type":0,"bitWidth":1,"label":"","connections":[12]},{"x":-10,"y":10,"type":0,"bitWidth":1,"label":"","connections":[13]},{"x":30,"y":0,"type":1,"bitWidth":1,"label":"","connections":[20]},{"x":-10,"y":-10,"type":0,"bitWidth":1,"label":"","connections":[14]},{"x":-10,"y":10,"type":0,"bitWidth":1,"label":"","connections":[15]},{"x":30,"y":0,"type":1,"bitWidth":1,"label":"","connections":[21]},{"x":-10,"y":-10,"type":0,"bitWidth":1,"label":"","connections":[16]},{"x":-10,"y":10,"type":0,"bitWidth":1,"label":"","connections":[17]},{"x":30,"y":0,"type":1,"bitWidth":1,"label":"","connections":[22]},{"x":-10,"y":-10,"type":0,"bitWidth":1,"label":"","connections":[18]},{"x":-10,"y":10,"type":0,"bitWidth":1,"label":"","connections":[19]},{"x":30,"y":0,"type":1,"bitWidth":1,"label":"","connections":[23]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[0]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[1]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[3]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[4]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[6]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[7]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[9]},{"x":10,"y":0,"type":1,"bitWidth":1,"label":"","connections":[10]},{"x":10,"y":0,"type":0,"bitWidth":1,"label":"","connections":[2]},{"x":10,"y":0,"type":0,"bitWidth":1,"label":"","connections":[5]},{"x":10,"y":0,"type":0,"bitWidth":1,"label":"","connections":[8]},{"x":10,"y":0,"type":0,"bitWidth":1,"label":"","connections":[11]}],"id":61002421165,"name":"Main","Input":[{"x":480,"y":150,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":12},"values":{"state":0},"constructorParamaters":["RIGHT",1,{"x":0,"y":20,"id":"el3V6iZqskEpCsaggf9Q"}]}},{"x":480,"y":170,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":13},"values":{"state":0},"constructorParamaters":["RIGHT",1,{"x":0,"y":40,"id":"X7LXZtRSIvLIQsPFKKKD"}]}},{"x":480,"y":230,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":14},"values":{"state":0},"constructorParamaters":["RIGHT",1,{"x":0,"y":60,"id":"hs5wbXTYA5nwSLi8jmIc"}]}},{"x":480,"y":250,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":15},"values":{"state":1},"constructorParamaters":["RIGHT",1,{"x":0,"y":80,"id":"VWZtYBpdBQbB2TJwup4d"}]}},{"x":480,"y":310,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":16},"values":{"state":1},"constructorParamaters":["RIGHT",1,{"x":0,"y":100,"id":"8ZQA3eFQQuFfFE1k3xiu"}]}},{"x":480,"y":330,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":17},"values":{"state":0},"constructorParamaters":["RIGHT",1,{"x":0,"y":120,"id":"7TD7ctoPUOu4HaxfjZEo"}]}},{"x":480,"y":390,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":18},"values":{"state":1},"constructorParamaters":["RIGHT",1,{"x":0,"y":140,"id":"9ZOEpcIWLcnimerqS0Dt"}]}},{"x":480,"y":410,"objectType":"Input","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":0,"customData":{"nodes":{"output1":19},"values":{"state":1},"constructorParamaters":["RIGHT",1,{"x":0,"y":160,"id":"9Me8sGmK2v0nB0TOd6zO"}]}}],"Output":[{"x":700,"y":160,"objectType":"Output","label":"","direction":"LEFT","labelDirection":"RIGHT","propagationDelay":0,"customData":{"nodes":{"inp1":20},"constructorParamaters":["LEFT",1,{"x":100,"y":20,"id":"AjjqZezZRfAr0J4gm52n"}]}},{"x":700,"y":240,"objectType":"Output","label":"","direction":"LEFT","labelDirection":"RIGHT","propagationDelay":0,"customData":{"nodes":{"inp1":21},"constructorParamaters":["LEFT",1,{"x":100,"y":40,"id":"fvV2pMItTBmgVchf651j"}]}},{"x":710,"y":320,"objectType":"Output","label":"","direction":"LEFT","labelDirection":"RIGHT","propagationDelay":0,"customData":{"nodes":{"inp1":22},"constructorParamaters":["LEFT",1,{"x":100,"y":60,"id":"ERq1mtFdMBrywO07dxTb"}]}},{"x":710,"y":400,"objectType":"Output","label":"","direction":"LEFT","labelDirection":"RIGHT","propagationDelay":0,"customData":{"nodes":{"inp1":23},"constructorParamaters":["LEFT",1,{"x":100,"y":80,"id":"FbTZHF8UzgsMtiM1KCpa"}]}}],"NandGate":[{"x":580,"y":160,"objectType":"NandGate","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":10,"customData":{"constructorParamaters":["RIGHT",2,1],"nodes":{"inp":[0,1],"output1":2}}},{"x":580,"y":240,"objectType":"NandGate","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":10,"customData":{"constructorParamaters":["RIGHT",2,1],"nodes":{"inp":[3,4],"output1":5}}},{"x":580,"y":320,"objectType":"NandGate","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":10,"customData":{"constructorParamaters":["RIGHT",2,1],"nodes":{"inp":[6,7],"output1":8}}},{"x":580,"y":400,"objectType":"NandGate","label":"","direction":"RIGHT","labelDirection":"LEFT","propagationDelay":10,"customData":{"constructorParamaters":["RIGHT",2,1],"nodes":{"inp":[9,10],"output1":11}}}],"restrictedCircuitElementsUsed":[],"nodes":[],"scopes":[],"logixClipBoardData":true}


project.name
0 Stars     11 Views

AND GATE

AND GATE

project.name
0 Stars     19 Views

HIMANSHU SONEKAR

HIMANSHU SONEKAR

project.name
0 Stars     25 Views
User:

AND GATE ( COA PRATICAL LAB )

AND GATE ( COA PRATICAL LAB )

project.name
0 Stars     13 Views

AND GATE

AND GATE

project.name
0 Stars     9 Views
User:

ECE

ECE

project.name
6 Stars     123 Views

This is the CTH-10 CPU. By CrEePeRz24321. (most updated version of the CTH Series) This uses all binary to operate. First click on Power to start. Turn Op to 1 and double click the RAM. Then type in the Op code you want. Only put inputs and read outputs of the User Interface. Wait until the Red light turns Green then start. If you want to change operations, then turn Op to 1 and double click the RAM. Then type in the Op code you want. (If you use full screen, and it keeps on kicking you out when you type, click full screen and then look to the bottom right and press + or - and don't touch the full screen after that unless the RAM input kicks you out)

0 is No Operation - Inputs unavailable

1 is RAM - write the address into In1, write the number you want to store into In2 and press Write.

2 is ADD - write the first digit into In1, write the second digit into In2

3 is Subtract - write the first digit into In1, write the second digit into In2

4 is Counter - Inputs unavailable

5 is AND Gate - write the first digit into In1, write the second digit into In2

6 is a Clock - Inputs unavailable

7 is Accessing the ROM - Inputs unavailable

8 is Binary to Decimal converter

9 is Random Number - Inputs unavailable

10 is Not Gate - write the converting digit into In1

11 is Shift Right* - write the converting digit into In1, write the shift number into In2

12 is Shift Left* - write the converting digit into In1, write the shift number into In2

13 is Multiply - write the first digit into In1, write the second digit into In2

14 is Divide - write the first digit into In1, write the second digit into In2**

HALT is to halt operation


*when using shift the first 3 digits of Out will be nonfunctional

**when using divide the first 4 digits away from the CPU are remainders and the last 4 digits closest to the CPU are quotients.

(There is also a Computer version that doesn't get updated much.)


project.name
1 Stars     60 Views

This is the CTH-10 CPU. This uses all binary to operate. First click on Power to start. Turn Op to 1 and double click the RAM. Then type in the Op code you want. Only put inputs and read outputs of the User Interface. Wait until the Red light turns Green then start. If you want to change operations, then turn Op to 1 and double click the RAM. Then type in the Op code you want. (If you use full screen, and it keeps on kicking you out when you type, click full screen and then look to the bottom right and press + or - and don't touch the full screen after that unless the RAM input kicks you out)

0 is No Operation - Inputs unavailable

1 is RAM - write the address into In1, write the number you want to store into In2 and press Write.

2 is ADD - write the first digit into In1, write the second digit into In2

3 is Subtract - write the first digit into In1, write the second digit into In2

4 is Counter - Inputs unavailable

5 is AND Gate - write the first digit into In1, write the second digit into In2

6 is a Clock - Inputs unavailable

7 is Accessing the ROM - Inputs unavailable

8 is Binary to Decimal converter

9 is Random Number - Inputs unavailable

10 is Not Gate - write the converting digit into In1

11 is Shift Right* - write the converting digit into In1, write the shift number into In2

12 is Shift Left* - write the converting digit into In1, write the shift number into In2

13 is Multiply - write the first digit into In1, write the second digit into In2

HALT is to halt operation


*when using shift the first 3 digits of Out will be nonfunctional


project.name
0 Stars     15 Views

project.name
0 Stars     8 Views

AND GATE

AND GATE

project.name
0 Stars     7 Views

VERIFICATION OF LOGIC GATES

VERIFICATION OF LOGIC GATES

project.name
0 Stars     5 Views
User:

Lvl 1

Lvl 1

project.name
0 Stars     12 Views
User:

project.name
2 Stars     10 Views

This is the basic  implementation of logic gate


project.name
0 Stars     8 Views

Implement Of Half Adder And Full Adder

Implement Of Half Adder And Full Adder

THIS IS MY SECOND PROJECT 


project.name
0 Stars     6 Views

GATES

GATES

project.name
0 Stars     5 Views

ALL GATES

ALL GATES

project.name
0 Stars     3 Views
User: