This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,
Result: Familiarisation with logic gates through virtual lab successfully completed.
RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.
Successfully completed half and full adder using gates and universal gates.
Rechnerorganisation TU Berlin WS2021
Verifying the truth tables of Basic and Universal Gates
Verification of basic gates
Representation of 7 logic gates.
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