project.name

Avinash Raj

Member since: 2 months

Educational Institution: VIT Bhopal University

Country: India

E-1 {Basic Logic Gates}

E-1 {Basic Logic Gates}
Public
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E-7 {2:4 Decoder}

E-7 {2:4 Decoder}
Public
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DLD Q1

DLD Q1
Public
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E-8 {Half Adder using 2:4 Decoder}

E-8 {Half Adder using 2:4 Decoder}
Public
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E-5 {Even and Odd parity generator}

E-5 {Even and Odd parity generator}
Public
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E-2 {Grey to Binary and vice versa}

E-2 {Grey to Binary and vice versa}
Public
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E-4 {Half and Full Substractor}

E-4 {Half and Full Substractor}
Public
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E-6 {2:1 MUX}

E-6 {2:1 MUX}
Public
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E-3 {Half Adder and Full Adder}

E-3 {Half Adder and Full Adder}
Public
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JK flip flop

JK flip flop
Public
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D flip flop Block Diagram

D flip flop Block Diagram
Public
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DLD Q2

DLD Q2
Public
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