Combo Test 4

Combo Test 3

Decoder Multiplexor

2 to 7 Decoder AND Buffer for g

4 bit Counter

JK 3 Stage Counter

And Or Not Demo

2 to 7 Decoder (1,2,3,4)

SR Flip Flops

7 Seg Decoder

RockPaperScissorDecoder

Full Adder using 2 Half Adders

AND OR

Full Adder using 2 Half Adders 2

Asynchrnous Up Counter

XNOR Logic NAND

2 to 4 Decoder with ICs

Digital Clock Module (Hours)

Digital Dice Decoder Phase 2

DICE Project Phase 4

Rock Paper Scissor Input Encoder

Tetra Counter

Detect Multiple HIGH Bits

4 Bit Adder

Adder Using Subcircuit

DICE Project Phase 6

Adder with Display Output

ALU (Decoder Multiplexor)

ABC + AB'(A'C')' Simplified

2 to 4 Decoder Clock Driven

XOR Comparitor

2 to 7 Line Decoder (Annotated)

Full Adder 2

Assign Combination 1

2 Line to 4 Line Decoder

DICE Display Decoded

Demorgan Law

Digital Clock Module (Seconds and Minutes)

2 Line to 4 Line Decoder Manual Counting

2 line to 7 Segment Counting

XOR Logic with more than two inputs

Rock Paper Sissor Multiple Switch Detection

DICE Display with counter

DICE Reset Phase 5

2 line - 7 segment decoder

4 bit ALU

Test of Tri-State Buffer

RAM With Address Counter

Manual RAM Test

4 to 16 line Decoder Demo

4 to 16 Line Subcircuit

4 to 16 line Decoder Detail

4 Bit Latch Prototype

4 Bit Latch Subcircuit

Moving Bar Display (2 bit)

Adder/Subtractor

4 Bit Transciever Sub Circuit

Tristate Latch 1

Bus Project 1

Multiplexors

2 bit ALU Phase 1

2 Bit Adder

Tri-State Latch

Tri-State Latch 1

2-bit Arithmetic Logic Unit