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3ECEB-ECE21117L-EXP1-DATO

3ECEB-ECE21117L-EXP1-DATO

Experiment 1: 

Testing truth table values for logic gate combinations


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Fundamental Logic Gates

Fundamental Logic Gates

Fundamental Gates...



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ECE21117L_3ECEB_EXP3_DATO

ECE21117L_3ECEB_EXP3_DATO

Experiment 3

Universality of NOR and NAND Gates and the De Morgan's Theorem in action


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Logic Gates

Logic Gates

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Logic Gates :-

Logic gates are the basic building blocks of any digital system. It is an electronic circuit having one or more than one input and only one output. The relationship between the input and the output is based on a certain logic. 

Logic gates are named as :

  • AND Gate
  • OR Gate
  • NOR Gate
  • NAND Gate
  • XOR Gate
  • XNOR Gate
  • NOT Gate

ASSIGNMENT :

In the given assignment I have to verify all the logic gates and hence I had used digital led for it.

  • Digital LED :

         Digital LED is used for verification of circuit in digital electronics. It glows when circuit gives a true value and do not glows when the value is false.

         In this assignment when the value will be true i.e., output will be 1 LED will glow with red color and else it will be shown in a white transparent color.

  • Truth table & verification images of different gates :-

  1. AND Gate :  

                   

   2. OR Gate :  

                   

   3. NOT Gate:

                                               

   4. NAND Gate :

                  

     

    5. NOR Gate:

                 


      6. XOR Gate:

                


      7. XNOR Gate:

             



** All the diagrams and truth tables I had used above is formed using tools provided in simulator.










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Lab01

Lab01

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Simple Logic Gates

Simple Logic Gates

Basic logic gates. Demonstrator for basic lectures on business information systems


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Verification of Truth Tables

Verification of Truth Tables

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Y= AB + A(B+C) + A’B

Y= AB + A(B+C) + A’B

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Logic Gates & Boolean Verification

Logic Gates & Boolean Verification

This is a project for the verification of boolean laws or logic gates.


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lab 2

lab 2

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Logic Gates

Logic Gates

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Test

Test

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CPU ALU BUILD

CPU ALU BUILD

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POS Eqution Circuit by Souvik Ghosh

POS Eqution Circuit by Souvik Ghosh

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SOP Equition Circuit by Souvik Ghosh

SOP Equition Circuit by Souvik Ghosh

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EXPERIMENT 11

EXPERIMENT 11

Implementation of a Full subtractor using basic gates


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Basic Logic Gates

Basic Logic Gates

Logic Gates and their Corresponding Truth Table


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2100290130046_Experient1

2100290130046_Experient1

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8/11/22

8/11/22

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3 bit Carry Look Ahead Adder

3 bit Carry Look Ahead Adder

sample input
A2A1A0= 110
B2B1B0= 101
expected output
S2S1S0 = 011, C3= 1


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HALF ADDER

HALF ADDER

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Logic Gates

Logic Gates

Logic Gates


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Untitled

Untitled

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Gates Experiment 1

Gates Experiment 1

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Juvenytte Pearson

Juvenytte Pearson

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Untitled

Untitled

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Logic gates as discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • Basic Logic Gates - demonstrates behavior of the five basic logic gates. [learn more]
  • Controlling Gates - demonstrates how signal propagation can be controlled by "opening" and "closing" the gates.
  • Combining Gates - demonstrates how logic gates can be combined to implement an arbitrary boolean function. [learn more]
  • 2-Bit Comparator - developed based on it's truth table by using the NOT, AND, and OR Gates.
  • 2x2-Bit Comparator - developed by using the 2-Bit Comparator.
  • 2-Bit Adder - developed by using the 2-Bit Comparator and basic logic gates. [learn more]

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2 Full Adder

2 Full Adder

Multiple Adder Gates- Pratheesh P


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suchitra

suchitra

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Untitled

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Exp 1

Exp 1