Member since: 1 year
Educational Institution: University Of Engineering And Technology Peshawar
Country: Pakistan
AND Gate
AND GateNand Gate
Nand GateNor gate display
Nor gate displayCIRCUIT FOR PRODUCT OF SUM POS FORM
CIRCUIT FOR PRODUCT OF SUM POS FORMSR LATCH
SR LATCHD FLIP-FLOP
D FLIP-FLOPLAB NO 6 (POS)
LAB NO 6 (POS)Karnaugh Map
Karnaugh MapSimplified
SimplifiedUnSimplified
UnSimplifiedLAB # 04
LAB # 04CIRCIUT FOR PRODUCT OF SUM (POS)
CIRCIUT FOR PRODUCT OF SUM (POS)TASK : 4 (D-Flip flop 4 bit shift-register)
TASK : 4 (D-Flip flop 4 bit shift-register)CIRCUIT FOR PRODUCT OF SUM POS FORM
CIRCUIT FOR PRODUCT OF SUM POS FORMGATES
GATESAnd gate display
And gate displayOR gate display
OR gate displayNand gate display
Nand gate displayXnor gate display
Xnor gate displayNor gate display
Nor gate displayCIRCUIT FOR PRODUCT OF SUM POS FORM
CIRCUIT FOR PRODUCT OF SUM POS FORMAnd gate display
And gate display8x1 multiplexer
8x1 multiplexerOR gate display
OR gate displaySR LATCH
SR LATCHxor gate display
xor gate display8x1 multiplexer
8x1 multiplexerTASK :1 (SR-LATCHES)
TASK :1 (SR-LATCHES)8x1 multiplexer by using all logic gates
8x1 multiplexer by using all logic gatesLAB # 04
LAB # 04And gate display
And gate displayGates Simulation
Gates SimulationUnSimplified
UnSimplifiedxor gate
xor gatexor gate display
xor gate displayUntitled
UntitledNOT gate display
NOT gate display8x1 multiplexer by using all logic gates
8x1 multiplexer by using all logic gates