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https://youtu.be/yyHd2UKErkA

Functions: https://docs.google.com/spreadsheets/d/1GiAXnaTXAUcgFKmCjEzwUsALLOG7dnfaSoeXQnN0Nm0

4-Bit 7-Segment Display using only NAND

1. AND

2. OR

3. NOT

4. NAND

5. NOR

6. XOR

7. XNOR

This project is regarding OR , NOT , AND , NAND , NOR , XNOR , XOR ,

Design and Realiization of Basic Logic Gates

Roll No. :- 12100119047
Dept. :- CSE (A)

q4

Result: Familiarisation with logic gates through virtual lab successfully completed.

RESULT: Familiarised different logic gates using universal gates (AND gate only as well as NOR gate) using virtual lab.

Successfully completed half and full adder using gates and universal gates.

Flipflops

Rechnerorganisation TU Berlin WS2021

Example NAND gate

Experiment 1

Introduction to logic gates and it's verification with truth table.

RS latch using NAND and NOR gates

Puertas Logicas

Verifying the truth tables of Basic and Universal Gates

Verification of basic gates

Representation of 7 logic gates.

verification of truth table

Basic circuits of all gates

2141039 Sourav Kumar Question No.4

SREELAKSHMI M

Sreelakshmi M

Full Subtractor using NAND Gates

OR,AND,NOT,NOR,NAND,XOR,XNOR

NOR GATE AS UNIVERSAL GATE

Construction of Basic Gates, i.e. AND, OR, NOT, XOR using Universal Gate NAND

Implementation of SR FLIP-FLOP using SR-LATCH

Implementation of SR LATCH using NAND Gate

Implementation of D FLIP-FLOP Using SR-Latch and NAND Gates

Implementation of JK FLIP FLOP

Implementation of D FLIP-FLOP using JK FLIP-FLOP

Implementation of a T FLIP-FLOP using JK FLIP FLOP

Working properly

These are logic gates

function F(D, C, B, A)= Σ(0, 1, 4, 5, 7, 8, 9, 12, 14, 15) realised only with NANDs

Implemented NAND

Construcción de compuertas fundamentales y derivadas mediante compuertas NAND.

Equivalencias a NAND de compuertas NOT, AND y OR para el trabajo Sumador de 4 bits con Compuertas Lógicas NAND.

Hecho por:

• Natalia Andrea Álvarez Hoyos
• Jean Carlo Montoya Castro
• Sebastián Valencia Zapata
• Alejandra Uribe Sierra

Estudiantes de la Universidad Nacional de Colombia. Semestre 2022-1. Asignatura Arquitectura de Computadores.

Basic Logic Gates Simulating online

VERIFYING THE TRUTH TABLES OF RESPECTIVE GATES.

This demonstrate the JK-Flipflop.

J 0, K 0 => do nothing
J 1, K 0 => Set (Q = 1, Q' = 0)
J 0, K 1 => Reset (Q = 0, Q' = 1)
J 1, K 1 => Toggle Q and Q'

Parte componenta a proiectului ASC: NAND.

Obtener la expresión de F que permita implementarla con el menor número de puertas posible, de cualquier tipo, y representar el circuito equivalente.

F(A, B, C, D) = AB + BC + CD

Expresión simplificada de la función F(A, B, C, D, E)

Example of OR gate built with only NAND gates.

This is a 1-bit-generator comparing two 1-bit values if they are less, equals or greater the other value. Only using NAND-Gates.

Full Adder using BOTH NAND and NOR gates.

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction is implemented with a NOT Gate and an adder (which simply adds 1 to the negated input).

A simple 8-bit arithmetic logical unit.

The following commands are implemented:

Logic Operations:
[0] 000: OR
[1] 001: NAND
[2] 010:NOR
[3] 011: AND
Arithmetic Operations:
[4] 100: ADD
[5] 101: SUB

The two's complement for subtraction uses the built in component.

Gerbang Logika NAND ini adalah gabungan dari gerbang AND dan gerbang NOT. Karena itu output yang dihasilkan dari gerbang NAND ini adalah kebalikan dari gerbang AND.

Berikut adalah simulasi gerbang logika dasar NAND :

A divide by 2 circuit using 8 NAND gates

Projeto de exemplo para ligar o segmento  f & e do display de 7 segmentos utilizando portas lógicas.

Completed 

Here is First Project ...Today dated 7-september-2023

Basic and Universal Gates

COMPLETED

COMPLETED

COMPLETED

COMPLETED

COMPLETED

This is basically work on Gates (AND, NAND, OR, XOR, XNOR,)

A voting Box where the bigger selection (two or more) is shown unless no one votes, then nothing is shown. Only using 2 input NAND gates.

NAND

Logic gate is a physical device implementing a Boolean function. It performs a logic operation on one or more binary inputs and produces a single binary output.

A free, simple, online logic gate simulator. Investigate the behaviour of AND, OR, NOT, NAND, NOR and XOR gates. Select gates from the dropdown list and click "add node" to add more gates. Drag from the hollow circles to the solid circles to make connections. Right click connections to delete them. See below for more detailed instructions.

Engineering Electronics Logic

Functional MUX gate made by ONLY using NAND gates

ABC

AISHWARYA M R

ALL GATES

UNIVERSAL GATES

This is a proyect to express the sum of 2 bit expressions with carry, where AB + CD are the binary numbers, R2 is the MSB and R1 is the LSB of the sum, and S is the final carry, ONLY USING NAND GATES.

4-bit Multiplexer implemented in NAND gates (both 3-input and 2-input) 

4-bit Multiplexer implemented in 2-input NAND gates.

Drawing the logic diagram of function  F(x, y, z)=  xy + x'y'z + x'yz' and its complement using two level NAND gate only on CircuitVerse. Assignment given by Dr. Ankita Vaish. Institute : Banaras Hindu University.

Draw the logic diagram to implement basic logic gates (AND, OR, NOT) using NAND gates only. Assignment given by Dr. Ankita Vaish. Institute : Banaras Hindu University.

Bramki NAND oraz demultipleksery

implementation of logic gates including basic and universal of 4-bit input 

LOGIC GATES

To Verify the Truth table of Universal Gates NAND and NOR

All types of gates representation