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Tags: D

project.name
0 Stars     667 Views
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User Image le derp

FF exercise "0101" Sequence Detector

FF exercise "0101" Sequence Detector
FF D 0101 sequence detector detector sequence substring
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using 2 D flip-flops to create a Sequence Detector for the sequence: "0101"
for the input: 
00000011111110110010010101010101010100101
matching the expected output: 
0000000000000000000000101010101010100001
project.name
0 Stars     103 Views
User:
User Image pongpisut suta

DoYoung

DoYoung
D
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project.name
0 Stars     102 Views
User:
User Image nainy mughal

dld

dld
D
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project.name
0 Stars     84 Views
User:
User Image ouissal

SVM

SVM
A B C D
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project.name
0 Stars     88 Views
User:
User Image FisMA

Lab4

Lab4
FlipFlop SR L D Toggle FF Latch
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Designing Toggle FlipFlop

project.name
0 Stars     107 Views
User:
User Image Franko Franić

BIST

BIST
BIST JK RS T D
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Franko Franić, Vježba 5

project.name
0 Stars     57 Views
User:
User Image Tomislav Kuliš

BIST

BIST
JK T D
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project.name
1 Stars     198 Views
User:
User Image Francisco Hernández Martínez

Digital Sequencial circuits

Digital Sequencial circuits
flip-flop RS JK D T counters shift registers
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Digital Sequential circuits

RS, JK, D, T

Shift Registers (SISO, SIPO, PISO, PIPO)

Counters (Asynchronous and Synchronous)

Counters with Shift Registers (RING counter, JOHNSON's counter)

project.name
0 Stars     149 Views
User:
User Image Saranga K. Mahanta

Johnson Counter

Johnson Counter
Flip flops D counter Johnson twisted-ring reset
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Done by: 

Saranga K. Mahanta

18-14-038

project.name
0 Stars     151 Views
User:
User Image Lhadi Bouzidi

Quelques CLS

Quelques CLS
Bascule RS D JK RS syncrhone D synchrone registre
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Dans ce projet, je construit quelques circuits logiques séquentiels:

  • Bascule RS
  • Bascule RSH (syncnhrone)
  • Bascule D
  • Bascule D synchrone
  • Bascule JK
  • Bascule K=JK synchrone
  • Bascule D flipflop
  • Registre
project.name
0 Stars     74 Views
User:
User Image sarah ibrahim

Devoir 3 (bascules)

Devoir 3 (bascules)
circuits logiques séquentieles_bascule RS D jk...
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dans ce projet j'édite les circuits logiques :

bascule RS

bascule D

registre

project.name
0 Stars     95 Views
User:
User Image Manish

Flip Flop Verifications

Flip Flop Verifications
SR JK D T Flip Flop
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project.name
0 Stars     113 Views
User:
User Image Jasper Ian Guanlao

Flip-Flops

Flip-Flops
Flip Flops S-C S-R J-K NAND NOR Clock T D
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Flipflops

project.name
0 Stars     105 Views
User:
User Image ROHITHA KA

FLIP FLOPS

FLIP FLOPS
SR JK D T
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project.name
0 Stars     69 Views
User:
User Image Mandar Uday Patil

verfication of truth table of all gates

verfication of truth table of all gates
M A N D R
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project.name
0 Stars     69 Views
User:
User Image Hrefaat

DLD Practical assignment Hana Hesham T 36 52-2395

DLD Practical assignment Hana Hesham T 36 52-2395
T flip Flop for A B C D
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T flip flop equation for A=A+CDB'

T flip flop equation for B=B+C'DA

T flip flop equation for C=A'B'C'D'+BC+AC+CD

T flip flop equation for D=C'DA'+BD+CDA+A'B'CD'

project.name
0 Stars     88 Views
User:
User Image Cyril Li

D Flip Flop

D Flip Flop
Flip Flop D Flip Flop Shift Register Register D Delay Line Memory Memory Cell
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D Flip Flop made from NOT and OR gates

project.name
0 Stars     62 Views
User:
User Image Bruno

Gated D latch

Gated D latch
latch D d
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project.name
0 Stars     105 Views
User:
User Image Kshitij Goyal

Flip Flop Using NAND GATE

Flip Flop Using NAND GATE
SR JK D T Flip Flop
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Flip Flop Using NAND GATE

SR, JK, D, T Flip Flop 

project.name
0 Stars     55 Views
User:
User Image Souvik Ghosh

D- Flip Flop by Souvik Ghosh

D- Flip Flop by Souvik Ghosh
D Flip Flop Sequential Circuit
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project.name
0 Stars     39 Views
User:
User Image M. jnana sai kiran

FLIP FLOPS

FLIP FLOPS
D T JK FLIP FLOPS
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project.name
0 Stars     63 Views
User:
User Image GURAMPATI SRINIVASULUREDDY

Flip-Flop

Flip-Flop
D T
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project.name
0 Stars     77 Views
User:
User Image 3102 - Ganuza

7 segment logic circuits

7 segment logic circuits
A B C D
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project.name
0 Stars     46 Views
User:
User Image Garvita Vijay

D flip flop

D flip flop
D flip flop D flip flop
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project.name
0 Stars     36 Views
User:
User Image Fiel Salazar

7 SEGMENT

7 SEGMENT
A B C D
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PROJECT FOR LCD

project.name
0 Stars     12 Views
User:
User Image Kim

Hiện thị led D

Hiện thị led D
D
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Hiển thị thanh đèn led D


project.name
0 Stars     36 Views
User:
User Image Manasi Dube

BCD to 7 segment display

BCD to 7 segment display
A B C D a b c d e f g
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BCD to 7 segment display

project.name
0 Stars     14 Views
User:
User Image pawan kumar vishwakarma

LAB 3

LAB 3
JK TO SR D T FLIP FLOP
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project.name
0 Stars     9 Views
User:
User Image maged mardy

Decryption

Decryption
A B C D
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project.name
0 Stars     11 Views
User:
User Image Aurelio Gallardo Rodríguez

RegistroD

RegistroD
Registros D Almacenamiento
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Registro de almacenamiento realizado con biestables D

project.name
0 Stars     14 Views
User:
User Image Aurelio Gallardo Rodríguez

regitroDdes

regitroDdes
Registros D Desplazamiento
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Registro de desplazamiento realizado con biestables D

project.name
0 Stars     7 Views
User:
User Image Igros Dharyl Calix

7SEGMENT

7SEGMENT
A B C D
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project.name
0 Stars     7 Views
User:
User Image Igros Dharyl Calix

7segment

7segment
A B C D
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project.name
0 Stars     10 Views
User:
User Image Karthika K

Untitled

Untitled
SR JK D T Flip-flop
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project.name
0 Stars     14 Views
User:
User Image Himani Singh

Assignment-5: Flip-Flops using NAND and NOT Gates

Assignment-5: Flip-Flops using NAND and NOT Gates
D T SR JK- latch/flip-flops using NAND and NOR gates
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Description:

1) Implement, truth table and generate waveform

2) D, T, SR, JK- latch using NAND and NOR gates

3) D, T, SR, JK - FF using NAND and NOR gates

4) D-FF using SR-FF

5) Master-slave JK-FF using NAND Gate

project.name
0 Stars     15 Views
User:
User Image Mateus Grellert

Latch D com NAND

Latch D com NAND
latch D
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project.name
0 Stars     10 Views
User:
User Image Brinda M N

Experiment 7 Level 1

Experiment 7 Level 1
verify truth table of T D SR JK flip flop
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project.name
0 Stars     3 Views
User:
User Image Camilo Valencia

TALLER COMPENSACION PUNTO 1

TALLER COMPENSACION PUNTO 1
A B C D Z
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project.name
1 Stars     3 Views
User:
User Image Danyal arshad

seven segment display

seven segment display
A B C D
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project.name
0 Stars     2 Views
User:
User Image Vatsal Patel

flip-flops

flip-flops
SR JK T D
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project.name
0 Stars     2 Views
User:
User Image Dhanvin Patel

Flip-Flop

Flip-Flop
SR JK T D
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