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Tags: D

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FF exercise "0101" Sequence Detector

FF exercise "0101" Sequence Detector
using 2 D flip-flops to create a Sequence Detector for the sequence: "0101"
for the input: 
00000011111110110010010101010101010100101
matching the expected output: 
0000000000000000000000101010101010100001

project.name
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DoYoung

DoYoung
D

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0 Stars     104 Views
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dld

dld
D

project.name
0 Stars     86 Views
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SVM

SVM
A B C D

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0 Stars     91 Views
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Designing Toggle FlipFlop


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0 Stars     110 Views

BIST

BIST

Franko Franić, Vježba 5


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BIST

BIST
JK T D

project.name
1 Stars     204 Views

Digital Sequencial circuits

Digital Sequencial circuits

Digital Sequential circuits

RS, JK, D, T

Shift Registers (SISO, SIPO, PISO, PIPO)

Counters (Asynchronous and Synchronous)

Counters with Shift Registers (RING counter, JOHNSON's counter)


project.name
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Johnson Counter

Johnson Counter

Done by: 

Saranga K. Mahanta

18-14-038


project.name
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Quelques CLS

Quelques CLS

Dans ce projet, je construit quelques circuits logiques séquentiels:

  • Bascule RS
  • Bascule RSH (syncnhrone)
  • Bascule D
  • Bascule D synchrone
  • Bascule JK
  • Bascule K=JK synchrone
  • Bascule D flipflop
  • Registre

project.name
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Devoir 3 (bascules)

Devoir 3 (bascules)

dans ce projet j'édite les circuits logiques :

bascule RS

bascule D

registre


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0 Stars     98 Views
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Flip Flop Verifications

Flip Flop Verifications

project.name
0 Stars     116 Views

Flip-Flops

Flip-Flops

Flipflops


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0 Stars     109 Views
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FLIP FLOPS

FLIP FLOPS
SR JK D T

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0 Stars     72 Views

verfication of truth table of all gates

verfication of truth table of all gates
M A N D R

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0 Stars     71 Views
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DLD Practical assignment Hana Hesham T 36 52-2395

DLD Practical assignment Hana Hesham T 36 52-2395

T flip flop equation for A=A+CDB'

T flip flop equation for B=B+C'DA

T flip flop equation for C=A'B'C'D'+BC+AC+CD

T flip flop equation for D=C'DA'+BD+CDA+A'B'CD'


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D Flip Flop made from NOT and OR gates


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0 Stars     73 Views
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Gated D latch

Gated D latch

project.name
0 Stars     110 Views

Flip Flop Using NAND GATE

Flip Flop Using NAND GATE

Flip Flop Using NAND GATE

SR, JK, D, T Flip Flop 


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0 Stars     59 Views
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D- Flip Flop by Souvik Ghosh

D- Flip Flop by Souvik Ghosh

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0 Stars     42 Views

FLIP FLOPS

FLIP FLOPS

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0 Stars     65 Views

Flip-Flop

Flip-Flop
D T

project.name
0 Stars     81 Views

7 segment logic circuits

7 segment logic circuits
A B C D

project.name
0 Stars     49 Views

D flip flop

D flip flop

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0 Stars     39 Views
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7 SEGMENT

7 SEGMENT
A B C D

PROJECT FOR LCD


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User Image Kim

Hiện thị led D

Hiện thị led D
D

Hiển thị thanh đèn led D



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BCD to 7 segment display

BCD to 7 segment display
A B C D a b c d e f g

BCD to 7 segment display


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0 Stars     17 Views

LAB 3

LAB 3

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0 Stars     11 Views
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Decryption

Decryption
A B C D

project.name
0 Stars     16 Views

RegistroD

RegistroD

Registro de almacenamiento realizado con biestables D


project.name
0 Stars     17 Views

regitroDdes

regitroDdes

Registro de desplazamiento realizado con biestables D


project.name
0 Stars     10 Views

7SEGMENT

7SEGMENT
A B C D

project.name
0 Stars     8 Views

7segment

7segment
A B C D

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0 Stars     15 Views
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Untitled

Untitled

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0 Stars     18 Views

Assignment-5: Flip-Flops using NAND and NOT Gates

Assignment-5: Flip-Flops using NAND and NOT Gates

Description:

1) Implement, truth table and generate waveform

2) D, T, SR, JK- latch using NAND and NOR gates

3) D, T, SR, JK - FF using NAND and NOR gates

4) D-FF using SR-FF

5) Master-slave JK-FF using NAND Gate


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Latch D com NAND

Latch D com NAND

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0 Stars     13 Views
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Experiment 7 Level 1

Experiment 7 Level 1

project.name
0 Stars     6 Views

TALLER COMPENSACION PUNTO 1

TALLER COMPENSACION PUNTO 1
A B C D Z

project.name
1 Stars     6 Views

seven segment display

seven segment display
A B C D

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0 Stars     4 Views
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flip-flops

flip-flops
SR JK T D

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0 Stars     3 Views

Flip-Flop

Flip-Flop
SR JK T D

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0 Stars     1 Views
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Untitled

Untitled
D

D