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Implementation of division via subtraction.

Durgesh Pandey

4-Bit Binary Adder Subtractor

DECO Practical Examination

Implement 3-bit parallel Binary Adder/Subtractor.

This adds numbers in Binary or something...

Instructions: If the LED is blinking, Press the reset button and then only input your values to obtain the difference. The MSB in the output and blinking LED indicate the negative sign.

Useful LINK for EXP : https://www.google.com/url?sa=i&url=https%3A%2F%2Fwww.iitg.ac.in%2Fcseweb%2Fvlab%2FDigital-System-Lab%2Fbinary_grey.php%3Fid%3D17&psig=AOvVaw1Qw4Z5u7eGC290w2CEGskC&ust=1633754301253000&source=images&cd=vfe&ved=0CAgQjRxqFwoTCKjclZj_ufMCFQAAAAAdAAAAABAm

Convert Binary to Hex/4bit

Magnitude Comparator is used to compare two binary numbers

Hello,

I have built a fully working converter that converts 16-bit binary code to BCD.

I wanted a mode with a small amount of gates instead of millions of cells connected in series to ROM. As a result, I designed the converter in a slightly different way, using only 5 ROM cells, one register, one shift register and, of course, since this is an algorithm where the operation is performed by cyclically changing one piece of data, we also need a control unit. This is only for clock control and a few minor details.

This conversion method is generally referred to as double-dabble, also known as shift-and-add-3. In fact, it is a large number of ROM cells, each cell handling a 4-bit or BCD code. It works by adding 3 to all numbers greater than or equal to 5, then shifting the entire range of bits to the left once. This cycle is repeated as many times as the length of the input bits, for example we have 8 bits and the cycle will be repeated eight times.

The main difference between my converter and the others is that mine is done by a clock that is constantly blinking, and drives the cyclical circulation of a piece of data continuously across exactly the same pair of cells. This method reduces the number of gates, but may be slightly slower and more complicated. While other circuits are mostly built with series connected ROM cells and this results in a simple circuit but a higher gate count compared to mine.

Below I have attached an image of one ROM cell that converts binary code to BCD. There is also a table that describes the behaviour of this cell perfectly.

For a better user experience, don't forget to read the instructions below.

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INSTRUCTIONS:
1. Reset your device before conversion!
    (RST = Reset button)
2. Enter the binary form of a number!
    (Input binary code)
3. Press the button to start the conversion!
    (BGN = Begin)
4. The clock must be on, it must blink 16 times!
    (CLK = Clock)
5. Read the BCD value!
    (Output BCD)

If you like my project, please give me a star (the button is on the bottom right), because it means a lot to me!

I hope you like the plan. I hope you enjoy the experience.

Hello,

I have designed a special converter. Converts a BCD or Binary Coded Decimal number to 16-bit binary logical number. The special feature is the surprising sequential entry of numbers!

This conversion method uses a small number of logic gates and the operation is cyclical, so a clock is essential. Each BCD value entry is equal to one cycle. The converter consists of a register called the Accumulator, a 16-bit full adder and a wire connection that correctly multiplies the number by 10. A small control unit is also needed to monitor the system.

An Accumulator is a type of register, usually the first one used to store results.

The device works by adding a value from 0 to 9 to each BCD input, storing it in a register and then multiplying by 10. The cycle is repeated for each entry. so, for example, the number 123 in the BCD value 0001 0010 0011 is sent sequentially to the converter. The first number sent will be 0001. The adder will add 0001, then store the value in a register and multiply it by 10 in the binary form 1010, and the result will be 1010. We will then send a second BCD number 0010. This number will be added to the previous stored number 1010 and the resulting number will be 1100. This number is again stored in the register and multiplied by 10 according to the current time, the result will be 1111000. Then send a third BCD value 0011, which is added to the stored value 1111000 to get 1111011. Now read our final result 1111011!

This converter design is quick and easy. Unlike the others, it converts sequential BCD input values and contains a small number of logic gates. Dabble Double algorithms exist for this conversion, but they behave differently.

I have attached a diagram of how the device works below. I hope it will help you with your planning!

INSTRUCTIONS:
1. Reset the device before use!
    (RST = Reset button)
2. Enter the BCD value!
    (Inpu BCD)
3. After each entry, send the value!
    (SND = Send)
4. Each entry is equal to one tick of the clock!
    (CLK = Clock)
5. The error will be logged!
    (E = Error)
6. Read the binary number!
    (Output binary)

If you like my project, please give me a star (the button is on the bottom right), because it means a lot to me!

I hope you like the plan. I hope you enjoy the experience.

Unfinished + bug

This is a proyect to express the sum of 2 bit expressions with carry, where AB + CD are the binary numbers, R2 is the MSB and R1 is the LSB of the sum, and S is the final carry, ONLY USING NAND GATES.

My first dive into logic gates! I learned how to add two 8-bit numbers together with an overflow value added. 

Use the 12 buttons to add two binary numbers together. See the binary result's by looking at the LED's and see the decimal result's by looking at the 7 digit display's. This adder's max is 63+63 (126).

A 4-bit Binary to Gray code converter changes a 4-bit binary number into its equivalent Gray code.

 In Gray code, only one bit changes at a time between consecutive numbers

A 4-bit Gray to Binary converter changes Gray code back to binary. The first binary bit matches the first Gray bit, and each next bit is found by XORing the previous binary bit with the current Gray bit.

Here, I have created a 4-bit BPA (Binary Parallel Adder) using 4 full adder circuit. Here A0/B0 is LSB (Least Significant Bit) and A3/B3 is MSB (Most Significant Bit). This circuit can perform 4-bit binary addition of two numbers.