Searched Projects

Tags: MUX

project.name
0 Stars     146 Views
User:
User Image Alex Nordhoff

MUX

MUX
MUX
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project.name
0 Stars     69 Views
User:
User Image Franko Franić

MUX

MUX
MUX
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Franko Franić, vježba 3

project.name
0 Stars     67 Views
User:
User Image Marko Prižmić

MUX

MUX
MUX
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project.name
0 Stars     239 Views
User:
User Image Saranga K. Mahanta

4X1 MUX using Basic Gates

4X1 MUX using Basic Gates
MUX Basic Gates
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Experiment No 6b: Implementation of 4x1 multiplexer using basic gates


Done by:

Saranga K. Mahanta

Scholar Id: 18-14-038

project.name
0 Stars     99 Views
User:
User Image Saranga K. Mahanta

Boolean Expression using MUX

Boolean Expression using MUX
MUX Boolean 8x1
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Experiment No 12: Implement the following function using MUX: (AB'+B'C'+AD).


Done by:

Saranga K. Mahanta

Sch Id: 18-14-038

project.name
0 Stars     1005 Views
User:
User Image Saranga K. Mahanta

JK FF using MUX

JK FF using MUX
MUX FF JK
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Experiment No 11 b: JK flip flop using 4x1 MUX.


Done by: 

Saranga K. Mahanta

Scholar Id: 18-14-038

project.name
0 Stars     829 Views
User:
User Image Saranga K. Mahanta

SR FF using MUX

SR FF using MUX
SR FF MUX
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Experiment No 11 a: SR flip flop using 2x1 MUXs.


Done by:

Saranga K. Mahanta

Schl Id: 18-14-038

project.name
0 Stars     123 Views
User:
User Image Saranga K. Mahanta

D FF using MUX

D FF using MUX
D FF MUX Sequential
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Experiment No 11 c: D flip flop using 2x1 MUXs.


Done by:

 Saranga K. Mahanta

Schl Id: 18-14-038

project.name
0 Stars     158 Views
User:
User Image Saranga K. Mahanta

T FF using MUX

T FF using MUX
T FF Sequential Circuits MUX
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Experiment No 11 d: T FF using 2x1 MUXs.


Done by:

Saranga Mahanta

Sch Id: 18-14-038

project.name
0 Stars     64 Views
User:
User Image Garvit

4*1 MUX

4*1 MUX
MUX gates
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project.name
0 Stars     63 Views
User:
User Image Kaivalya Pitale

Kaivalya 21444 implementation of 8:1 MUX using two 4:1 MUX

Kaivalya 21444 implementation of 8:1 MUX using two 4:1 MUX
MUX multiplexer
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project.name
0 Stars     85 Views
User:
User Image Kaivalya Pitale

Boolean expression realization using single 4:1 MUX using LSB reduction

Boolean expression realization using single 4:1 MUX using LSB reduction
LSB reduction MUX Multiplexer Realization
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project.name
0 Stars     57 Views
User:
User Image ARCHANA S

16:1 MUX

16:1 MUX
MUX
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project.name
0 Stars     68 Views
User:
User Image Arghya

ALU

ALU
Multiplexer 4:1 MUX MUX
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This is a circuit design for 4:1 Multiplexer

project.name
0 Stars     52 Views
User:
User Image Abhijith V. Nair

EXP 2

EXP 2
MUX DEMUX Enocer & Decoder
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project.name
0 Stars     46 Views
User:
User Image atri pal

Implement F (M,N,P,R) = π M(1,4,6,9,12,14) using 8 X 1 MUX

Implement F (M,N,P,R) = π M(1,4,6,9,12,14) using 8 X 1 MUX
max terms implement MUX
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project.name
0 Stars     34 Views
User:
User Image Mostafa Othman

MUX Test

MUX Test
MUX
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This is just a MUX Test

project.name
0 Stars     40 Views
User:
User Image 0053_Nihal Babu

adder and subtractors

adder and subtractors
adder subtractor MUX decoder
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project.name
0 Stars     87 Views
User:
User Image Chandan Kumar

DEMUX

DEMUX
DEMUX 1:4 DEMUX MUX COMBINATION_CIRCUIT DIGITAL_ELECTRINICS
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project.name
0 Stars     36 Views
User:
User Image Jitendra Yadav

4x1 mux

4x1 mux
MUX
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project.name
0 Stars     269 Views
User:
User Image Pritam K.

2:1 MULTIPLEXER

2:1 MULTIPLEXER
MUX 2:1 MUX MISCELLANEOUS Combinational Circuits
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Implementation of a 2:1 MUX using Basic Gates

project.name
1 Stars     29 Views
User:
User Image Saqlain Rashid

DE_LAB_16.12.2021

DE_LAB_16.12.2021
HALF ADDER FULL ADDER MUX
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project.name
0 Stars     41 Views
User:
User Image Om Garg

ALU Lab - 4

ALU Lab - 4
ALU MUX LAB-4
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ALU Function Table

project.name
0 Stars     14 Views
User:
User Image Samyak Jain

MUX ALU

MUX ALU
MUX ALU MUXALU
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project.name
0 Stars     29 Views
User:
User Image Sanchi Baghel

16:1 FMUX

16:1 FMUX
MUX
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project.name
0 Stars     22 Views
User:
User Image Sanchi Baghel

16:1F'MUX

16:1F'MUX
MUX
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project.name
0 Stars     27 Views
User:
User Image Sanchi Baghel

8x1AinMUX

8x1AinMUX
MUX
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project.name
0 Stars     32 Views
User:
User Image Sanchi Baghel

8x1FMUX

8x1FMUX
MUX
View
project.name
0 Stars     27 Views
User:
User Image Sanchi Baghel

8x1FCMUX

8x1FCMUX
MUX
View
project.name
0 Stars     24 Views
User:
User Image Sanchi Baghel

8x1FDMUX

8x1FDMUX
MUX
View
project.name
0 Stars     23 Views
User:
User Image Sanchi Baghel

8x1FdAMUX

8x1FdAMUX
MUX
View
project.name
0 Stars     27 Views
User:
User Image Sanchi Baghel

8x1FdBMUX

8x1FdBMUX
MUX
View
project.name
0 Stars     26 Views
User:
User Image Sanchi Baghel

8x1FdCMUX

8x1FdCMUX
MUX
View
project.name
0 Stars     21 Views
User:
User Image Sanchi Baghel

8x1FdDMUX

8x1FdDMUX
MUX
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project.name
0 Stars     26 Views
User:
User Image Sanchi Baghel

16x1CCMUX

16x1CCMUX
MUX
View
project.name
0 Stars     21 Views
User:
User Image Sanchi Baghel

8x1CCWMUX

8x1CCWMUX
MUX
View
project.name
0 Stars     26 Views
User:
User Image Sanchi Baghel

8x1CCXMUX

8x1CCXMUX
MUX
View
project.name
0 Stars     21 Views
User:
User Image Sanchi Baghel

8x1CCYMUX

8x1CCYMUX
MUX
View
project.name
0 Stars     18 Views
User:
User Image Sanchi Baghel

8x1CCZMUX

8x1CCZMUX
MUX
View
project.name
0 Stars     23 Views
User:
User Image Leonardo Luengas

Lab MUX y ALU

Lab MUX y ALU
Fundamentos MUX ALU
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project.name
0 Stars     10 Views
User:
User Image PANACHAI KONGJA

Part A - 74HC157

Part A - 74HC157
MUX 74HC157
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project.name
0 Stars     19 Views
User:
User Image Mayank Gaur

2-bit Arithmetic Logic Unit

2-bit Arithmetic Logic Unit
Gates MUX
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2-bit Arithmetic Logic Unit

project.name
0 Stars     16 Views
User:
User Image anshuman mohanty

anshuman1

anshuman1
MUX XNOR TRUTH TABLE
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project.name
0 Stars     13 Views
User:
User Image NAYELY MARIA POMA QUISPE

LAB 2022-1

LAB 2022-1
Labs encoders MUX
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project.name
0 Stars     9 Views
User:
User Image 郭育里

HW3

HW3
DMUX MUX
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project.name
0 Stars     14 Views
User:
User Image Reeshman Sanofar A

circuitverse rs

circuitverse rs
HA FA HS FS MUX DMUX ER DR
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project.name
0 Stars     6 Views
User:
User Image 629_Saloni Mohakar

DEL lab assignment 3.1

DEL lab assignment 3.1
MUX
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project.name
0 Stars     6 Views
User:
User Image 629_Saloni Mohakar

DEL ASSIGNMENT3.2

DEL ASSIGNMENT3.2
MUX
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project.name
0 Stars     64 Views
User:
User Image Rishav Kumar

SR flip flop using MUX

SR flip flop using MUX
MUX SR FLIPFLOP FF SR FF
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SR Flip flop using two 2x1 mux

project.name
0 Stars     12 Views
User:
User Image George Romero

MULTIPLEXOR

MULTIPLEXOR
MUX MUX 4:1
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project.name
0 Stars     6 Views
User:
User Image Diego Mijael Navarro Puicon

MULTIPLEXOR

MULTIPLEXOR
MUX MU4:1
View
project.name
0 Stars     11 Views
User:
User Image George Romero

MULTIPLEXOR

MULTIPLEXOR
MUX DEMUX
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project.name
0 Stars     9 Views
User:
User Image Brigitte Zarella Arvorco Leon

MUX y DEMUX

MUX y DEMUX
MUX DEMUX
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project.name
0 Stars     4 Views
User:
User Image Shivanshi Verma

Shivanshi Verma

Shivanshi Verma
MUX
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POS canonical  expression  of MUX and circuit implemented in MUX

project.name
0 Stars     10 Views
User:
User Image Hari Sada Karthik Pillala

Untitled

Untitled
MUX Decoder encoder
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project.name
0 Stars     13 Views
User:
User Image George Lathouris

NAND only MUX

NAND only MUX
NAND MUX
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Functional MUX gate made by ONLY using NAND gates

project.name
0 Stars     12 Views
User:
User Image Fint Berry

4:1 MUX

4:1 MUX
MUX 4:1 adder binry
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project.name
0 Stars     5 Views
User:
User Image Leah Edwards

Untitled

Untitled
CpE 5220 Project Homework MUX mSOP SOP
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A given truth table translated to a sum-of-product logic circuit and a multiplexer circuit.

project.name
0 Stars     3 Views
User:
User Image Tushar

2310994564 MUX DEMUX

2310994564 MUX DEMUX
1:2 2:1 MUX DEMUX Exp3
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project.name
0 Stars     7 Views
User:
User Image R-802

EEEN202 FSM Project

EEEN202 FSM Project
Finite State Machine Stepper Driver Half Step Counter MUX Gray Code
View

Design of a half step and full step stepper motor driver using D flip-flops and multiplexers.

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