Searched Projects

Adjustable 8-bit adder which either loads values from two different registers into an 8-bit adder or sequentially adds the current output value of the adder to the value stored in the first register. Practice for RAM unit application, register creation and organization, bit splitting and compression, and sequential logic.

More practice for sequential logic, implementing multiple sub-circuits to simplify the functionality of the design.

An attempt at utilizing memory storage to create some output based on information inputted into ROM block; output changes when ROM enable is toggled while the address input counter changes to change up the sequence of input bits to the registers.

More practice for memory logic. Toggle enable ROM to change up the sequence or introduce more values

Practice for utilizing ROM to produce an output based on some sequential input.

ROM-instructed sequence taking data in and using half of the bits to perform memory storage and selection functions.

Returning to creations involving the use of RAM units to build larger registers for use with counters and ROM to provide a randomized output