Member since: 938 days
Educational Institution: Techno India University kolkata
Country: India
AND from NAND
AND from NANDOR from NAND
OR from NANDNOT from NAND
NOT from NANDAll Gates
All GatesAND
ANDNOT using NOR
NOT using NORHalf Adder ,Full adder , Half Subtractor and Full Subtractor
Half Adder ,Full adder , Half Subtractor and Full SubtractorFull Adder Using NAND gate
Full Adder Using NAND gateXNOR from NAND
XNOR from NAND8bit Substractor
8bit SubstractorOR using NOR
OR using NORFull subtractor using NAND gate
Full subtractor using NAND gateAND using NAND
AND using NANDHalf Adder
Half AdderUntitled
UntitledExperiment-2
Experiment-2AND OR NOT Gate
AND OR NOT Gate1x4 Demux using 2 to 4 Decoder
1x4 Demux using 2 to 4 DecoderQ.15) Full adder Implementation
Q.15) Full adder ImplementationQ.16) Full Subtractor Implementation
Q.16) Full Subtractor ImplementationBinary -to -Gray, Gray -to -Binary code converte
Binary -to -Gray, Gray -to -Binary code converteBASIC LOGIC GATES USING NOR GATE
BASIC LOGIC GATES USING NOR GATEFull adder using NAND Gate
Full adder using NAND GateHalf Subtractor and Full Subtractor
Half Subtractor and Full Subtractorhalf subtractor
half subtractorFull Adder using NAND and NOR gates
Full Adder using NAND and NOR gatesH.A. using nor gate and H.A. using XOR , AND gate
H.A. using nor gate and H.A. using XOR , AND gateExperiment-2
Experiment-2