project.name

Nilanjan Das

Member since: 511 days

Educational Institution: Techno India University kolkata

Country: India

Untitled

Untitled
Public
Untitled

OR using NOR

OR using NOR
Public
OR using NOR

Full subtractor using NAND gate

Full subtractor using NAND gate
Public
Full subtractor using NAND gate

AND OR NOT Gate

AND OR NOT Gate
Public
AND OR NOT Gate

AND using NAND

AND using NAND
Public
AND using NAND

1x4 Demux using 2 to 4 Decoder

1x4 Demux using 2 to 4 Decoder
Public
1x4 Demux using 2 to 4 Decoder

Half Adder

Half Adder
Public
Half Adder

XNOR from NAND

XNOR from NAND
Public
XNOR from NAND

8bit Substractor

8bit Substractor
Public
8bit Substractor

Experiment-2

Experiment-2
Public
Experiment-2

AND from NAND

AND from NAND
Public
AND from NAND

OR from NAND

OR from NAND
Public
OR from NAND

NOT from NAND

NOT from NAND
Public
NOT from NAND

All Gates

All Gates
Public
All Gates

Full adder using NAND Gate

Full adder using NAND Gate
Public
Full adder using NAND Gate

Q.15) Full adder Implementation

Q.15) Full adder Implementation
Public
Q.15) Full adder Implementation

Binary -to -Gray, Gray -to -Binary code converte

Binary -to -Gray, Gray -to -Binary code converte
Public
Binary -to -Gray, Gray -to -Binary code converte

Q.16) Full Subtractor Implementation

Q.16) Full Subtractor Implementation
Public
Q.16) Full Subtractor Implementation

Full Adder Using NAND gate

Full Adder Using NAND gate
Public
Full Adder Using NAND gate

Half Subtractor and Full Subtractor

Half Subtractor and Full Subtractor
Public
Half Subtractor and Full Subtractor

AND

AND
Public
AND

BASIC LOGIC GATES USING NOR GATE

BASIC LOGIC GATES USING NOR GATE
Public
BASIC LOGIC GATES USING NOR GATE

Half Adder ,Full adder , Half Subtractor and Full Subtractor

Half Adder ,Full adder , Half Subtractor and Full Subtractor
Public
Half Adder ,Full adder , Half Subtractor and Full Subtractor

NOT using NOR

NOT using NOR
Public
NOT using NOR

half subtractor

half subtractor
Public
half subtractor

Full Adder using NAND and NOR gates

Full Adder using NAND and NOR gates
Public
Full Adder using NAND and NOR gates

H.A. using nor gate and H.A. using XOR , AND gate

H.A. using nor gate and H.A. using XOR , AND gate
Public
H.A. using nor gate and H.A. using XOR , AND gate

Experiment-2

Experiment-2
Public
Experiment-2
No result image
Nilanjan Das is not a collaborator of any project.