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Nilanjan Das

Member since: 3 years

Educational Institution: Techno India University kolkata

Country: India

AND from NAND

AND from NAND
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OR from NAND

OR from NAND
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NOT from NAND

NOT from NAND
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All Gates

All Gates
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AND

AND
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Full Adder Using NAND gate

Full Adder Using NAND gate
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OR using NOR

OR using NOR
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AND using NAND

AND using NAND
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Half Adder

Half Adder
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Untitled

Untitled
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AND OR NOT Gate

AND OR NOT Gate
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1x4 Demux using 2 to 4 Decoder

1x4 Demux using 2 to 4 Decoder
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Q.16) Full Subtractor Implementation

Q.16) Full Subtractor Implementation
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Half Subtractor and Full Subtractor

Half Subtractor and Full Subtractor
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Q.15) Full adder Implementation

Q.15) Full adder Implementation
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Experiment-2

Experiment-2
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Half Adder ,Full adder , Half Subtractor and Full Subtractor

Half Adder ,Full adder , Half Subtractor and Full Subtractor
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Full adder using NAND Gate

Full adder using NAND Gate
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NOT using NOR

NOT using NOR
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BASIC LOGIC GATES USING NOR GATE

BASIC LOGIC GATES USING NOR GATE
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8bit Substractor

8bit Substractor
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Binary -to -Gray, Gray -to -Binary code converte

Binary -to -Gray, Gray -to -Binary code converte
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XNOR from NAND

XNOR from NAND
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Full subtractor using NAND gate

Full subtractor using NAND gate
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half subtractor

half subtractor
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Full Adder using NAND and NOR gates

Full Adder using NAND and NOR gates
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H.A. using nor gate and H.A. using XOR , AND gate

H.A. using nor gate and H.A. using XOR , AND gate
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Experiment-2

Experiment-2
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No result image
Nilanjan Das is not a collaborator of any project.