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Tags: AND Gate

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0 Stars     101 Views
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User Image Eric Sheng

AND gate

AND gate
AND Gate
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This is an AND gate circuit.
project.name
1 Stars     65 Views
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User Image Dina Emad Nemr Atwaan

AND

AND
AND Gate
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project.name
0 Stars     47 Views
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User Image Singh Pooja

AND Gate

AND Gate
AND Gate
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This is AND Gate. 

project.name
0 Stars     54 Views
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User Image Singh Pooja

AND Gate

AND Gate
AND Gate
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This an AND Gate

project.name
0 Stars     48 Views
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User Image Utkarsh Saxena

AND Gate

AND Gate
AND Gate
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project.name
0 Stars     49 Views
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User Image Shubham Agarwal

AND Gate

AND Gate
AND Gate
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project.name
0 Stars     66 Views
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User Image RUDRA PRATAP SINGH

AND GATE

AND GATE
AND Gate
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this is our lab 1 and the experiment 3, in which we perform the experiment on and gate

project.name
1 Stars     73 Views
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User Image Karan Dev

Gates

Gates
OR Gate AND Gate NOT Gate NOR Gate NAND Gate XOR Gate and XNOR Gate
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project.name
0 Stars     50 Views
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User Image Gloria Gordon-Mensah

Gloria Gordon-Mensah

Gloria Gordon-Mensah
AND Gate
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project.name
0 Stars     71 Views
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User Image ADINATH AJITH NAIK

Verifying Basic gates

Verifying Basic gates
AND Gate OR Gate NOT Gate XOR Gate XNOR Gate NOR Gate NAND Gate
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Verifying Truth Table of Basic and Universal Gates

project.name
0 Stars     125 Views
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User Image Punjay Chetan Sharma

Multiplexer

Multiplexer
Multiplexer 2:1 MUX Logic Gates AND Gate OR gate NOT gate 2:1 Multiplexer
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project.name
0 Stars     47 Views
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User Image Abhishek Mishra

Multiplexer 4 X 1

Multiplexer 4 X 1
AND Gate OR Gate
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project.name
2 Stars     215 Views
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User Image S.M. RIYAD

Experiment-3.1: De Morgan's Laws (1st Theorem) using the logic gates.

Experiment-3.1: De Morgan's Laws (1st Theorem) using the logic gates.
De Morgan's Laws De Morgan's Law De Morgan's Theorems De Morgan's Theorem De Morgan's first Theorem De Morgan's 1st Theorem De Morgan's second Theorem De Morgan's 2nd Theorem Logic Gates Logic Gate NOR Gate NOT Gate AND Gate 7402 IC 7404 IC 7408 IC..
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project.name
0 Stars     41 Views
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User Image Kaousthub Reddy H

3-bit synchronous counter using JKFF

3-bit synchronous counter using JKFF
JK Flip Flop AND Gate
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project.name
0 Stars     20 Views
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User Image TADDI GANESH

Lab-1

Lab-1
AND Gate
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project.name
0 Stars     13 Views
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User Image YNS HARSHEESWAR REDDY

logic gates

logic gates
AND Gate
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project.name
0 Stars     5 Views
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User Image Hariom Patidar 23bai10999

23BAI10999_Circuits_Gates

23BAI10999_Circuits_Gates
AND Gate
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project.name
0 Stars     5 Views
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User Image B.Abhinay

AND Gate

AND Gate
AND Gate
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project.name
0 Stars     5 Views
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User Image Anwesha Dutta

X-OR Gate Eqv. Circuit

X-OR Gate Eqv. Circuit
X-OR Gate AND Gate NOT Gate
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project.name
0 Stars     3 Views
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User Image Josue Torres

Circuito 1 Cibernetica

Circuito 1 Cibernetica
AND Gate
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Primera tarea circuito

Josue Yael Torres Flores

Grupo: 512

Profesor: Armando Rodriguez Arguijo

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