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Tags: CAMPUS 02

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8 Stars     172 Views

[CSCA] Combinational Logic Circuits

[CSCA] Combinational Logic Circuits

Combinational logic circuits discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • XOR Gate - developed by using the basic logic gates.
  • Half-Adder - developed by using the XOR Gate. [learn more]
  • Full-Adder - developed by using Half-Adders. [learn more]
  • Comparator - developed by using the XOR Gate.
  • Shifter - developed by using the basic logic gates.
  • Multiplexer - developed by using the basic logic gates. [learn more]
  • Demultiplexer - developed by using the basic logic gates. [learn more]
  • Decoder - developed by using the basic logic gates. [learn more]
  • Arithmetic-Logic Unit (ALU)  - developed by using the basic logic gates, Decoder, and a Full-Adder. [learn more]

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5 Stars     85 Views

[CSCA] Counters and Timing Signals

[CSCA] Counters and Timing Signals

Counters and timing signal generators discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • Sample 2-Bit Counter - a simple counter exploratory developed by students during the lectures.
  • Sample 2-Bit Counter with Timing Signals - that simple counter extended with decoder to provide timing signals.
  • 2-Bit Switch-Tail Ring Counter - developed by using D flip-flops.
  • 2-Bit Johnson Counter - developed by extending the 2-Bit Switch-Tail Ring Counter with decoder to provide timing signals.
  • 4-Bit Switch-Tail Ring Counter - developed by extending the 2-Bit Switch-Tail Ring Counter with two more D flip-flops. [learn more (see chapters at the bottom of the page)]
  • 4-Bit Johnson Counter - developed by extending the 4-Bit Switch-Tail Ring Counter with decoder to provide timing signals. [learn more (see chapters at the bottom of the page)]

project.name
5 Stars     103 Views

[CSCA] Registers and Memory

[CSCA] Registers and Memory

Registers and memory elements discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • 4-Bit Register - developed by using D flip-flops.
  • 4-Bit Register (Enabling the Clock Signal) - 4-Bit Register with enabling of the register implemented via enabling of the clock signal.
  • 4x4-Bit Memory - with read and write access and reading buffer set to zeros in case of writing.
  • Tri-State Buffers - explains the tri-state buffer element.
  • Mutually Exclusive Tri-State Buffers - demonstrates how to use tri-state buffers to mutually exclude parts of a circuit.
  • 4x4-Bit Memory with Tri-State Buffers - developed by extending the 4x4-Bit Memory with Tri-state buffers to cut of the reading buffer in case of writing.
  • 4x4-Bit Memory with MAR and MDR - developed by extending the 4x4-Bit Memory with Tri-State Buffers with the Memory Address Register (MAR) and Memory Data Register (MDR).
  • 4x4-Bit Random Access Memory (RAM) - demonstrates using the built-in RAM element.
  • 4x4-Bit Random Access Memory (RAM) with MAR and MDR - demonstrates using the built-in RAM element extended with the Memory Address Register (MAR) and Memory Data Register (MDR).

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0 Stars     26 Views

Logic gates as discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • Basic Logic Gates - demonstrates behavior of the five basic logic gates. [learn more]
  • Controlling Gates - demonstrates how signal propagation can be controlled by "opening" and "closing" the gates.
  • Combining Gates - demonstrates how logic gates can be combined to implement an arbitrary boolean function. [learn more]
  • 2-Bit Comparator - developed based on it's truth table by using the NOT, AND, and OR Gates.
  • 2x2-Bit Comparator - developed by using the 2-Bit Comparator.
  • 2-Bit Adder - developed by using the 2-Bit Comparator and basic logic gates. [learn more]

project.name
1 Stars     56 Views

[CSCA] Latches and Flip-flops

[CSCA] Latches and Flip-flops

Latches and flip-flops as discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • SR Latch - demonstrates the behavior of an SR Latch. [learn more]
  • Clock - demonstrates the Clock Signal. [learn more]
  • Clocked SR Latch - developed by bringing the Clock Signal to the SR Latch. [learn more]
  • D Latch - demonstrates the behavior of a D Latch. [learn more]
  • Clocked D Latch - developed by bringing the Clock Signal to the D Latch. [learn more]