Searched Projects

A synchronous counter using T flip-flop that counts up the sequence of my Student ID for Digital Logic Design (EEEB1034) final project. 

Digital Logic Design, Sequential. Combinational Logic, ALU, CPU, Finite State Machine, FSM, State Diagram, State Table, Flip Flops, Registers, Counters

My first lab simulator

"This project demonstrates the basic functionality of logic gates (AND, OR, NOT) using a digital circuit simulation. It is designed to help understand the principles of Digital Logic Design (DLD) and the relationship between inputs and outputs in logic circuits."