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Tags: Digital Logic Design

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Final Project EEEB1034 (EP0107823)

Final Project EEEB1034 (EP0107823)

A synchronous counter using T flip-flop that counts up the sequence of my Student ID for Digital Logic Design (EEEB1034) final project. 


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Digital Logic Design, Sequential. Combinational Logic, ALU, CPU, Finite State Machine, FSM, State Diagram, State Table, Flip Flops, Registers, Counters