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My Processor Design

My Processor Design

A basic ALU design for my personal projects.


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prossesor-16-bit

prossesor-16-bit

[ Under Development ]

This is a 16-bit processor with 18 instructions of length 16 bit, 16 registers of size 16 bit and only the primary cache in its architecture.


[ Instruction Set ]

from 0 to f
0 is also known as ra as its used for jump and link and jump register

instructions

0000 0XXX XXXX XXXX    - no-op     X can be anything- no operation
0000 1XXX XXXX XXXX    - jmp   X is the address offset from pc  - jump
0001  XXXX YYYY YYYY    - lli   X is the register to write data to and Y is the data to load in lower 8 bits- load lower imediate
0010  XXXX YYYY YYYY    - orui  X is the register to write data to and Y is the data to or with the upper 8 bits in X - or upper imediate
0011  0XXX XXXX XXXX    - jal   X is the address offset to pc and pc+1 is stored in ra - jump and link
0011  1XXX  XXXX XXXX    - jr   X can be anything, pc is restored by value in ra- jump register( only from ra register )
0100 XXXX YYYY ZZZZ    - shw  X is the register containing the data to write, Y is the offset, Z is the register containing the address in memory  - store 16bits in memory ( Addresses in memory can be read or written 16 bits at a time only)
0101  XXXX YYYY ZZZZ   - lhw  X is the register to store data in, Y is the offset,  Z is the register containing the memory address  - load 16bits from memory                          ( That is 0 represents first 16 bits and 1 represents next 16 bits)
0110  XXXX YYYY ZZZZ    - beq  X is the PC offset, Y and Z are registers to compare - break equal
0111  XXXX YYYY ZZZZ   - bne   X is the PC offset, Y and Z are registers to compare - break not equal

In the following, assume $ is the operation

X, Y and Z are registers, X=Y$Z

1000 XXXX YYYY ZZZZ    - and   - and gate
1001 XXXX YYYY ZZZZ    - or    - or gate
1010 XXXX YYYY ZZZZ    - add   - addition
1100 XXXX YYYY ZZZZ    - and~  - A and ~B
1101  XXXX YYYY ZZZZ   - or~   - A or ~B
1110  XXXX YYYY ZZZZ    - sub   - subtraction

if(Y<Z) X=1 else X=0

1111  XXXX YYYY ZZZZ    - stl   - set less than

To do list:

Forwarding unit - on going

Hazard detection unit - yet to start


project.name
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Processor

Processor

project.name
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Simple Computer and all needed for it


project.name
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Functional Electronic Machine Binary Operator Yes - 8-bit cpu

This is a work in progress right now.


INSTRUCTION SET:
00: NOP - Nothing
01: HLT - Halt program
02: OUT [r] - Output a register
03: LDA [d8] - Loads 8 bit data into the accumulator
04: MOV [r], A - Move register to accumulator
05: MOV A, [r] - Move accumulator to register
06: INC [r] - Increment a register
07: DEC [r] - Decrememt a register
08: ADD [r], A - Add the accumulator from a register
09: SUB [r], A - Subtract the accumulator from a register
0A: AND [r], A - And the register and accumulator
0B: IOR [r], A - OR the register and accumulator
0C: XOR [r], A - XOR the register and accumulator
0D: NOT [r] - NOT a register
0E: SRR [r] - Shift register right
0F: SRL [r] - Shift register Left


REGISTERS:
00: 
REGISTER 1
01: REGISTER 2
02: REGISTER 3
04: REGISTER 4


Update Notes:
Final design before update of is a.


To-Do:
Add WIP instructions
Add the accumulator to a register address
Increase amount of registers to 8
Add Ram manipulation instructions
Add Input to CPU
Add more operations to the ALU
Add ASCII i/o
Make a simple command line
Make an assember
Make a simple operating system for the cpu
Add rgb output


project.name
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User:

Functional Electronic Machine Binary Operator Yes - 8-bit cpu

This is a work in progress right now.


INSTRUCTION SET:
00: NOP - Nothing
01: HLT - Halt program
02: OUT [r] - Output a register
03: LDA [d8] - Loads 8 bit data into the accumulator
04: MOV [r], A - Move register to accumulator
05: MOV A, [r] - Move accumulator to register
06: INC [r] - Increment a register
07: DEC [r] - Decrememt a register
08: ADD [r], A - Add the accumulator from a register
09: SUB [r], A - Subtract the accumulator from a register
0A: AND [r], A - And the register and accumulator
0B: IOR [r], A - OR the register and accumulator
0C: XOR [r], A - XOR the register and accumulator
0D: NOT [r] - NOT a register
0E: SRR [r] - Shift register right
0F: SRL [r] - Shift register Left


REGISTERS:
00: 
REGISTER 1
01: REGISTER 2
02: REGISTER 3
04: REGISTER 4


Update Notes:
The instruction set now has 16 instructions with logic operations, loading, shift, and nop. 


To-Do:
Add WIP instructions
Add the accumulator to a register address
Increase amount of registers to 8
Add Ram manipulation instructions
Add Input to CPU
Add more operations to the ALU
Add ASCII i/o
Make a simple command line
Make an assember
Make a simple operating system for the cpu
Add rgb output