project.name

Aadarsh Pandey

Member since: 2 years

Educational Institution: Ajay Kumar Garg Engineering College ,Ghaziabad

Country: India

Half Adder

Half Adder
Public
Half Adder

Flip Flops

Flip Flops
Public
Flip Flops

3x8 Decoder

3x8 Decoder
Public
3x8 Decoder

Binary To Gray (4 BIT)

Binary To Gray (4 BIT)
Public
Binary To Gray (4 BIT)

Full Adder using 2 x Half Adder

Full Adder using 2 x Half Adder
Public
Full Adder using 2 x Half Adder

4x1 MUX

4x1 MUX
Public
4x1 MUX

EXP-6 8-BIT I/O with 4x 8-BIT Internal REG.

EXP-6 8-BIT I/O with 4x 8-BIT Internal REG.
Public
EXP-6 8-BIT I/O with 4x 8-BIT Internal REG.

exp-7 DATA PATH OF COMPUTER FROM IT

exp-7 DATA PATH OF COMPUTER FROM IT
Public
exp-7 DATA PATH OF COMPUTER FROM IT
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