Demultiplexer
Demultiplexer
1X8 Demux
1X8 Demux
Exp-6 To simulate a common bus using tri-state buffer using demux
Exp-6 To simulate a common bus using tri-state buffer using demux
1:8 demux
1:8 demux
MUX DEMUX
MUX DEMUX
Internal GATE diagram of Demux
Internal GATE diagram of Demux
EXPERIMENT 15B
EXPERIMENT 15BImplementation of a DEMUX using Basic Gates and other DEMUX'es
DEMUX Counter
DEMUX Counter
2 Channel Demultiplexer
2 Channel Demultiplexer
4 Channel Demultiplexer
4 Channel Demultiplexer
8 Channel Demultiplexer
8 Channel Demultiplexer
Lab 7: Demultiplexer
Lab 7: Demultiplexer
Demultiplexer
Demultiplexer
Program 4 - DeMultiplexer
Program 4 - DeMultiplexer
LAB PROJECT
LAB PROJECTClass lab project
Mux/Demux
Mux/Demux
Demultiplexer
DemultiplexerSomething lol
Mux and Demux
Mux and Demux
Encoder, Decoder, Multiplexer, Demultiplexer
Encoder, Decoder, Multiplexer, Demultiplexer
Aron Sorimuda Johanes Pasaribu_24060124130086
Aron Sorimuda Johanes Pasaribu_24060124130086Praktikum 4 Dasar Sistem A1 Informatika 2024
Tugas: Membuat Encoder 4x2, Subcircuit Encoder, Priority Encoder, Decoder 2x4, Latihan nomor 4a, 4b, dan 5
1 x 4 Demultiplexer
1 x 4 DemultiplexerImplementation of demultiplexer.
RPS(Logicgates,Decoder,Mux,Demux)
RPS(Logicgates,Decoder,Mux,Demux)Explanation of the Rock-Paper-Scissors Logic Circuit
• Inputs (4 one-bit signals):
o Player 1 (A1, A0): Represents Player 1's choice
o Player 2 (B1, B0): Represents Player 2's choice
(00 for Rock, 01 for Paper, 10 for Scissors).
• Outputs (2 one-bit signals):
o W1 (Player 1 wins signal): High (1) if Player 1 wins.
o W0 (Player 2 wins signal): High (1) if Player 2 wins.
Winning Conditions and Boolean Equations
The circuit determines the winner using the following Boolean equations:
Player 1 Wins (W1)
• The first term, ensures that Player 1 wins in scenarios like:
o Rock (00) vs. Scissors (10)
o Paper (01) vs. Rock (00)
o Scissors (10) vs. Paper (01)
• The second term, further ensures the correctness of win conditions.
Player 2 Wins (W0)
• The first term, ensures that Player 2 wins in cases like:
o Rock (00) vs. Paper (01)
o Paper (01) vs. Scissors (10)
o Scissors (10) vs. Rock (00)
• The second term, confirms the correctness of Player 2's winning scenarios.
Don't Care Condition
• If either Player 1 or Player 2 selects 11, it is an invalid case, and the output should be undefined (don't care).
Explanation of the Circuit Implementations
1. Decoder-Based Implementation
• A 4-to-16 decoder takes A1, A0, B1, and B0 as inputs.
• The decoder activates one of its 16 outputs based on the binary inputs.
• The active output is then passed through OR gates to determine the winner based on the W1and W_0 equations.
2. Multiplexer-Based Implementation
• A multiplexer (MUX) selects the correct output based on A1, A0, B1, and B0.
• The control inputs of the multiplexer are used to implement the logic conditions for W1 and W0.
3. Demultiplexer-Based Implementation
• A demultiplexer (DEMUX) routes the input signal based on A1, A0, B1, and B0.
• It helps distribute the input conditions to the appropriate logic gates.
4. Logic Gate-Based Implementation
• Direct AND, OR, XOR, and NOT gates are used to implement the Boolean equations.
• The circuit follows the fundamental Boolean logic derived from the given W1and W0 expressions.
