Parity Generator and Parity Checker

Implementation of Boolean expression using single 8:1 MUX

conversion of ff

Asynchronous UP and Down counter

Sequence detector

Untitled

Implementation of 2-bit comparator

BCD to XS3 code converter

Implement f(A,B,C,D)=(0,2,4,7,9,10,12,13,15) using IC 74153

Implementation of Boolean expression using Single 4:1 MUX MSB reduction

Even Parity Generator and Parity Checker

Boolean expression realization using single 4:1 MUX using LSB reduction

Boolean expression realization with 4:1 MUX using MSB reduction method

Boolean expression implementation with 4:1 MUX usisng LSB reduction method

DEMUX and Decoder

Implement full adder and full subtractor using IC 74153 (Dual 4:1 MUX)

3-bit binary to gray code converter using 4:1 MUX

Implement 3 bit Gray to Binary code converter using 3:8 decoder.

Implementation of Boolean expression using 8:1 MUX

Parity Generator and Parity Checker

Kaivalya 21444 implementation of 8:1 MUX using two 4:1 MUX

Design D flip flop using IC7476

Implementation of Decoder in boolean expressions

Implementation of 2 bit comparators using logic gates

Implementation of 3 bit Adder using Decoder in boolean expressions

Implementation of Boolean expression using Single 4:1 MUX LSB reduction