DPSD

DESIGN AND IMPLEMENTATION OF MULTIPLEXER

T FLIP FLOP

STUDY OF LOGIC GATES

FULL ADDER

DESIGN OF ADDER AND SUBTRACTOR

DESIGN AND IMPLEMENTATION OF CODE CONVERTORS

JK FLIP FLOP

BCD PART 2

D FLIP FLOP

EX NO1

IMPLEMENTATION OF SHIT REGISTER

fghhg

HALF ADDER

DESIGN AND IMPLEMENTATION OF MAGNITUDE COMPARATOR

VERIFICATION OF BOOLEAN THEOREMS USING DIGITAL LOGIC GATES

DESIGN AND IMPLEMENTATION OF CODE CONVERTOR

DESIGN AND IMPLEMENTATION OF DEMULTIPLEXER