# Searched Projects

## Tags: 2

0 Stars     113 Views

### Untitled

Untitled

0 Stars     112 Views

### HARSHIT

HARSHIT

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### pract2

pract2

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### 2'complement

2'complement

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### AYÇA METİN

AYÇA METİN

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### Experiment 1

Experiment 1

The second lab experiment using simulator.

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### Or

Or

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### 2 практика

2 практика

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###### User:

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### 3-8 line decoder

3-8 line decoder

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### Experoment no 2

Experoment no 2

Test functionality of Universal gates.

1 Stars     61 Views

### Practicle 2

Practicle 2

AIM

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### verification of de morgan law

verification of de morgan law

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w2w

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### Activity 3

Activity 3

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### LAB2

LAB2

2

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###### User:

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###### User:

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### UL_ARQ_3

UL_ARQ_3

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### Assignment

Assignment

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### Activity 4

Activity 4

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### 0 to 2 counter

0 to 2 counter

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### Untitled

Untitled

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### 13-2

13-2

13,2

0 Stars     81 Views

### DC Lab

DC Lab

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### LAB ASSIGNMENT 20BCS011

LAB ASSIGNMENT 20BCS011

0 Stars     18 Views

### trab circui

trab circui

0 Stars     69 Views

### 21UCS051_Exp9

21UCS051_Exp9

0 Stars     44 Views

### Clase 3 de Mayo

Clase 3 de Mayo

0 Stars     14 Views

### Michael Powell - CircuitVerse_CSX_2

Michael Powell - CircuitVerse_CSX_2

This circuit determines what theorems in calculus are guaranteed for a function given a set of five inputs.

0 Stars     8 Views

### 2*4 decoder

2*4 decoder

0 Stars     8 Views

### manmeet

manmeet

digital gates

1 Stars     9 Views

### 20221CBD0014

20221CBD0014

0 Stars     9 Views

### 20221CBD0014

20221CBD0014

0 Stars     14 Views

### Half subtractor using XOR and NAND

Half subtractor using XOR and NAND

Experiment 2

Level 1

0 Stars     14 Views

### Full Subtractor using XOR and NAND

Full Subtractor using XOR and NAND

Experiment 2

Level 1

0 Stars     13 Views
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0 Stars     14 Views

### Transformation of nor gate into NOT and OR gate

Transformation of nor gate into NOT and OR gate

Experiment 1

Level 2

0 Stars     15 Views

### 3 bit Full subtractor using NAND gate

3 bit Full subtractor using NAND gate

Level 2

0 Stars     10 Views

### 3 bit half subtractor using NAND gate

3 bit half subtractor using NAND gate

Level 2

0 Stars     14 Views

### 4 to 1 MUX

4 to 1 MUX

Realization of 4 to 1 MUX using basic gates and XOR gate

0 Stars     12 Views

### 1 to 4 DE-Multiplexer

1 to 4 DE-Multiplexer

De-Multiplexer

0 Stars     12 Views

### 4 to 1 DEMUX

4 to 1 DEMUX

By using universal gates

0 Stars     12 Views

### 2 to 4 decoder

2 to 4 decoder

Encoder and decoder logic gates

0 Stars     12 Views

### 4 to 2 Priority encoder

4 to 2 Priority encoder

Priority encoder

0 Stars     10 Views

### Design of Logic Diagram using NAND gate-exp 5

Design of Logic Diagram using NAND gate-exp 5

Experiment 5

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### exp 5: design of logic diagram using NAND gates

exp 5: design of logic diagram using NAND gates

exp 5-using NAND Gates

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### JK to D flip flop conversion

JK to D flip flop conversion

Experiment 6

Level 2

0 Stars     17 Views

### D,T,SR,JK Flip flop

D,T,SR,JK Flip flop

Experiment 6

Level 1

0 Stars     22 Views

### EXP 6: D,T,SR,JK Flip-flops

EXP 6: D,T,SR,JK Flip-flops

FLIPS-FLOPS

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### Assignment4

Assignment4

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### GATE VERIFICATION

GATE VERIFICATION

his is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A.

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both of its two inputs are high. An encircled plus sign (⊕) is used to show the Ex-OR operation.

The 'Exclusive-NOR' gate circuit does the opposite to the EX-OR gate. It will give a low output if either, but not both of its two inputs are high. The symbol is an EX-OR gate with a small circle on the output. The small circle represent

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### Basic gates

Basic gates

0 Stars     7 Views

### Untitled

Untitled

project 2

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### EXP_1

EXP_1

0 Stars     9 Views

### punto dos del parcial

punto dos del parcial

0 Stars     13 Views

### lab4

lab4

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### lab4

lab4

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### lab4

lab4

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### Untitled

Untitled

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### CABANERO AND VELARDE

CABANERO AND VELARDE

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### EXP8

EXP8

0 Stars     10 Views

### circuis

circuis

0 Stars     6 Views

### JK flip flop

JK flip flop

0 Stars     7 Views

### harshita ds

harshita ds

0 Stars     9 Views

### experiment3

experiment3

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### Untitled

Untitled

0 Stars     6 Views

### tema2steriemioara

tema2steriemioara

0 Stars     7 Views

### EXP-2

EXP-2

1 Stars     6 Views

### FULL ADDER AND FULL SUBTRACTOR

0 Stars     4 Views

### Multiplexoare

Multiplexoare

0 Stars     7 Views

### EX 7

EX 7

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### safa imtiaz

safa imtiaz

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### GRAY CODE TO BINARY CODE

GRAY CODE TO BINARY CODE

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DLD Q2