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prepract

prepract
3

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Untitled

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semisumador 1

semisumador 1
3

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full adder

full adder
3

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sumador completo

sumador completo
3

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UAL de 2 bit

UAL de 2 bit
3

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HARSHIT

HARSHIT
3

project.name
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pract3

pract3
3

project.name
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Experiment 1

Experiment 1
1 2a 2b 3 4a 4b 5 6 7a 7b 8 9

NIKHIL GUPTA 

1960627


project.name
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experement 2 2,3,4,5, question 2061008

experement 2 2,3,4,5, question 2061008

 question no ; 2,3,4,5


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3 bit counter

3 bit counter

3 bit counter


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janjuas project

janjuas project
1 3

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4 X 1 MULTIPLEXER

4 X 1 MULTIPLEXER
3

project.name
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Practical 3

Practical 3

AIM : IMPLEMENT 3-BIT PARALLEL BINARY ADDER/SUBTRACTOR


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practical 3

practical 3

AIM:IMPLEMENT 3BIT PARALLEL BINARY ADDER/SUBTRACTOR


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logic gates

logic gates
3

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2*4 Decoder

2*4 Decoder

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Practical assignment 3

Practical assignment 3
3

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Activity 3

Activity 3
1 2 3 4 5

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DSD Lab Assignment 2 (Task #3) - 3 Bit Magnitude Comparator

DSD Lab Assignment 2 (Task #3) - 3 Bit Magnitude Comparator

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assignment3

assignment3

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ACT 4

ACT 4
3

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S MEENAKSHI

S MEENAKSHI
3

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HW6

HW6
3 4

shoo


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41_Vidhi Prajapati_Logic Gates (AND)

41_Vidhi Prajapati_Logic Gates (AND)
3

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DC Lab

DC Lab
1 2 3 4

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21UCS051_Exp9

21UCS051_Exp9
3

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3

3
3

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3

3
3

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Implementing 3-8 line DECODER

Implementing 3-8 line DECODER
3

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full subtractor

full subtractor
3

full subtractor


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User Image A

Untitled

Untitled
3

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JK flip flop implementation using NAND gate

JK flip flop implementation using NAND gate
3

Experiment 6

Level 2


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D,T,SR,JK Flip flop

D,T,SR,JK Flip flop
1 2 3 4

Experiment 6

Level 1


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Assignment4

Assignment4
Q.1 2 3 4 5

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GATE VERIFICATION

GATE VERIFICATION
1 2 3 4 5 6 7

his is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A. 

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both of its two inputs are high. An encircled plus sign (⊕) is used to show the Ex-OR operation.

The 'Exclusive-NOR' gate circuit does the opposite to the EX-OR gate. It will give a low output if either, but not both of its two inputs are high. The symbol is an EX-OR gate with a small circle on the output. The small circle represent


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Mapas K (5 bits)

Mapas K (5 bits)

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Untitled

Untitled
3

project.name
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Untitled

Untitled
3

project.name
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CABANERO AND VELARDE

CABANERO AND VELARDE
L o u S A 2 3

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D flip flop

D flip flop
3

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EXPERIMENT NO 3

EXPERIMENT NO 3
3

project.name
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EXP 3

EXP 3
3

project.name
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safa imtiaz

safa imtiaz

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FULL ADDER

FULL ADDER
3

project.name
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GRAY CODE TO BINARY CODE

GRAY CODE TO BINARY CODE
2 3

project.name
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verification of logicgates3

verification of logicgates3
3

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Untitled

Untitled
3

project.name
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verifcation of boolean laws 3

verifcation of boolean laws 3
3

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Idempotent Law

Idempotent Law
3

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PROJECT 3

PROJECT 3
3

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PROJECT-3

PROJECT-3
3

project.name
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Experiment 3 (2)

Experiment 3 (2)
3

project.name
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Experiment 3 (1)

Experiment 3 (1)
3

project.name
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3*8 decoder

3*8 decoder
3

project.name
0 Stars     4 Views

Experiment3

Experiment3
3