Searched Projects

Tags: 3

project.name
0 Stars     148 Views

prepract

prepract
3

project.name
0 Stars     111 Views

Untitled

Untitled
3

project.name
0 Stars     122 Views

semisumador 1

semisumador 1
3

project.name
0 Stars     113 Views

full adder

full adder
3

project.name
0 Stars     127 Views

sumador completo

sumador completo
3

project.name
0 Stars     143 Views

UAL de 2 bit

UAL de 2 bit
3

project.name
0 Stars     124 Views

HARSHIT

HARSHIT
3

project.name
0 Stars     98 Views

pract3

pract3
3

project.name
0 Stars     84 Views

Experiment 1

Experiment 1
1 2a 2b 3 4a 4b 5 6 7a 7b 8 9

NIKHIL GUPTA 

1960627


project.name
1 Stars     108 Views

experement 2 2,3,4,5, question 2061008

experement 2 2,3,4,5, question 2061008

 question no ; 2,3,4,5


project.name
0 Stars     126 Views

3 bit counter

3 bit counter

3 bit counter


project.name
0 Stars     85 Views
User:

janjuas project

janjuas project
1 3

project.name
0 Stars     44 Views
User:

4 X 1 MULTIPLEXER

4 X 1 MULTIPLEXER
3

project.name
1 Stars     79 Views

Practical 3

Practical 3

AIM : IMPLEMENT 3-BIT PARALLEL BINARY ADDER/SUBTRACTOR


project.name
0 Stars     68 Views

practical 3

practical 3

AIM:IMPLEMENT 3BIT PARALLEL BINARY ADDER/SUBTRACTOR


project.name
0 Stars     34 Views
User:

logic gates

logic gates
3

project.name
0 Stars     59 Views

2*4 Decoder

2*4 Decoder

project.name
0 Stars     50 Views
User:

Practical assignment 3

Practical assignment 3
3

project.name
0 Stars     84 Views

Activity 3

Activity 3
1 2 3 4 5

project.name
0 Stars     102 Views

DSD Lab Assignment 2 (Task #3) - 3 Bit Magnitude Comparator

DSD Lab Assignment 2 (Task #3) - 3 Bit Magnitude Comparator

project.name
0 Stars     37 Views
User:

assignment3

assignment3

project.name
0 Stars     36 Views

ACT 4

ACT 4
3

project.name
0 Stars     18 Views
User:

S MEENAKSHI

S MEENAKSHI
3

project.name
0 Stars     83 Views
User:

HW6

HW6
3 4

shoo


project.name
0 Stars     74 Views
User:

41_Vidhi Prajapati_Logic Gates (AND)

41_Vidhi Prajapati_Logic Gates (AND)
3

project.name
0 Stars     87 Views
User:

DC Lab

DC Lab
1 2 3 4

project.name
0 Stars     36 Views
User:

21UCS051_Exp9

21UCS051_Exp9
3

project.name
0 Stars     25 Views

3

3
3

project.name
0 Stars     9 Views
User:

3

3
3

project.name
0 Stars     16 Views

Implementing 3-8 line DECODER

Implementing 3-8 line DECODER
3

project.name
0 Stars     20 Views
User:

full subtractor

full subtractor
3

full subtractor


project.name
0 Stars     11 Views
User:
User Image A

Untitled

Untitled
3

project.name
0 Stars     14 Views
User:

JK flip flop implementation using NAND gate

JK flip flop implementation using NAND gate
3

Experiment 6

Level 2


project.name
0 Stars     22 Views
User:

D,T,SR,JK Flip flop

D,T,SR,JK Flip flop
1 2 3 4

Experiment 6

Level 1


project.name
0 Stars     28 Views

Assignment4

Assignment4
Q.1 2 3 4 5

project.name
0 Stars     40 Views

GATE VERIFICATION

GATE VERIFICATION
1 2 3 4 5 6 7

his is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A. 

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both of its two inputs are high. An encircled plus sign (⊕) is used to show the Ex-OR operation.

The 'Exclusive-NOR' gate circuit does the opposite to the EX-OR gate. It will give a low output if either, but not both of its two inputs are high. The symbol is an EX-OR gate with a small circle on the output. The small circle represent


project.name
0 Stars     45 Views

Mapas K (5 bits)

Mapas K (5 bits)

project.name
0 Stars     9 Views
User:

Untitled

Untitled
3

project.name
0 Stars     11 Views

Untitled

Untitled
3

project.name
0 Stars     39 Views

CABANERO AND VELARDE

CABANERO AND VELARDE
L o u S A 2 3

project.name
0 Stars     8 Views
User:

D flip flop

D flip flop
3

project.name
0 Stars     6 Views
User:

EXPERIMENT NO 3

EXPERIMENT NO 3
3

project.name
0 Stars     11 Views

EXP 3

EXP 3
3

project.name
0 Stars     11 Views

safa imtiaz

safa imtiaz

project.name
0 Stars     7 Views
User:

FULL ADDER

FULL ADDER
3

project.name
0 Stars     6 Views
User:

GRAY CODE TO BINARY CODE

GRAY CODE TO BINARY CODE
2 3

project.name
0 Stars     3 Views

verification of logicgates3

verification of logicgates3
3

project.name
0 Stars     5 Views
User:

Untitled

Untitled
3

project.name
0 Stars     4 Views

verifcation of boolean laws 3

verifcation of boolean laws 3
3

project.name
0 Stars     4 Views

Idempotent Law

Idempotent Law
3

project.name
0 Stars     4 Views
User:

PROJECT 3

PROJECT 3
3

project.name
0 Stars     5 Views
User:

PROJECT-3

PROJECT-3
3

project.name
0 Stars     7 Views

Experiment 3 (2)

Experiment 3 (2)
3

project.name
0 Stars     4 Views

Experiment 3 (1)

Experiment 3 (1)
3

project.name
0 Stars     4 Views

3*8 decoder

3*8 decoder
3

project.name
0 Stars     4 Views

Experiment3

Experiment3
3

project.name
0 Stars     6 Views

ДЕШЕФРАТОР

ДЕШЕФРАТОР

Дешефрирует двоичные числа в десятичные от 1 до 4. Левая лампа 1. Правая лампа 4.


project.name
0 Stars     7 Views

project.name
0 Stars     4 Views

EXP3

EXP3
EXR 3

EXP3