**Member since:** 9 months

**Educational Institution:** presidency university banglore

**Country:** India

full adder

full adder
Public

exp 2

exp 2
Public

4:2 Priority encoder

4:2 Priority encoder
Public

LEVEL 2 DEMUX

LEVEL 2 DEMUX
Public

full subtractor

full subtractor
Public

2 to 4 decoder

2 to 4 decoder
Public

half adder using XOR and NAND gate

half adder using XOR and NAND gate
Public

half subtractor using XOR and NANAD Gates

half subtractor using XOR and NANAD Gates
Public

AND gate using NAND gate

AND gate using NAND gate
Public

LEVEL 2 DEMUX USING UNIVERSAL GATE

LEVEL 2 DEMUX USING UNIVERSAL GATE
Public

2-to-1 multiplexer

2-to-1 multiplexer
Public

4:1 MUX using basic gates and XOR gate

4:1 MUX using basic gates and XOR gate
Public

DEMUX

DEMUX
Public

DEMULTIPLEXER

DEMULTIPLEXER
Public

LEVEL2- Using universal gate MUX

LEVEL2- Using universal gate MUX
Public

MUX USING UNIVERSAL GATE

MUX USING UNIVERSAL GATE
Public

level 2 half adder using nand gate only

level 2 half adder using nand gate only
Public

level 2 half subtractor using nand gate only

level 2 half subtractor using nand gate only
Public

level 2 full subtractor using nand gate only

level 2 full subtractor using nand gate only
Public

level 2 full adder using nand gate only

level 2 full adder using nand gate only
Public

exp 3 MUX using basic and XOR gate

exp 3 MUX using basic and XOR gate
Public

Experiment-8

Experiment-8
Public

Experiment-7

Experiment-7
Public

Digital of logic diagram using basic gates

Digital of logic diagram using basic gates
Public

EXP 4...encoder and decoder logic circuits

EXP 4...encoder and decoder logic circuits
Public

exp 5: design of logic diagram using NAND gates

exp 5: design of logic diagram using NAND gates
Public

exp 6: Conversion of one FF to other

exp 6: Conversion of one FF to other
Public

level 2:exp 6 JK To D Flip-flop conversion

level 2:exp 6 JK To D Flip-flop conversion
Public

EXP 6: JK Flip-flop implementation using nand gate

EXP 6: JK Flip-flop implementation using nand gate
Public

EXP 6: JK To D Flip-flop

EXP 6: JK To D Flip-flop
Public

LEVEL 2: Priority encoder

LEVEL 2: Priority encoder
Public

OR gate using NOR gate

OR gate using NOR gate
Public

NOT gate using NOR gate

NOT gate using NOR gate
Public

AND Gate using NOR Gate

AND Gate using NOR Gate
Public

EXP 6: D,T,SR,JK Flip-flops

EXP 6: D,T,SR,JK Flip-flops
Public

OR Gate using NAND Gate

OR Gate using NAND Gate
Public