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0 Stars     114 Views

HARSHIT

HARSHIT

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HARSHIT

HARSHIT

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Experiment 1

Experiment 1

NIKHIL GUPTA

1960627

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D FLIPFLOP

D FLIPFLOP

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2Lista

2Lista

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ACTIVITY 4

ACTIVITY 4

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41_Vidhi_Logic Gates_(XOR)

41_Vidhi_Logic Gates_(XOR)

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21UCS051_Exp9

21UCS051_Exp9

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Week 6

Week 6

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exp 2

exp 2

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NOT gate using NOR gate

NOT gate using NOR gate

Transformation of NOR Gate into NOT Gate

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level 2:exp 6 JK To D Flip-flop conversion

level 2:exp 6 JK To D Flip-flop conversion

JK TO D FLIP-FLOP CONVERSION

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GATE VERIFICATION

GATE VERIFICATION

his is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion.

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion.

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A.

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both of its two inputs are high. An encircled plus sign (⊕) is used to show the Ex-OR operation.

The 'Exclusive-NOR' gate circuit does the opposite to the EX-OR gate. It will give a low output if either, but not both of its two inputs are high. The symbol is an EX-OR gate with a small circle on the output. The small circle represent

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Mapas K (5 bits)

Mapas K (5 bits)

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Untitled

Untitled

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verification of logic gates 6

verification of logic gates 6

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verification of boolean laws6

verification of boolean laws6

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Associative Law 1

Associative Law 1

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Associative Law 2

Associative Law 2