Searched Projects

Digital Logic Design, Sequential. Combinational Logic, ALU, CPU, Finite State Machine, FSM, State Diagram, State Table, Flip Flops, Registers, Counters

Registers and memory elements discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

• 4-Bit Register - developed by using D flip-flops.
• 4-Bit Register (Enabling the Clock Signal) - 4-Bit Register with enabling of the register implemented via enabling of the clock signal.
• 4x4-Bit Memory - with read and write access and reading buffer set to zeros in case of writing.
• Tri-State Buffers - explains the tri-state buffer element.
• Mutually Exclusive Tri-State Buffers - demonstrates how to use tri-state buffers to mutually exclude parts of a circuit.
  
• 4x4-Bit Memory with Tri-State Buffers - developed by extending the 4x4-Bit Memory with Tri-state buffers to cut of the reading buffer in case of writing.
• 4x4-Bit Memory with MAR and MDR - developed by extending the 4x4-Bit Memory with Tri-State Buffers with the Memory Address Register (MAR) and Memory Data Register (MDR).
• 4x4-Bit Random Access Memory (RAM) - demonstrates using the built-in RAM element.
• 4x4-Bit Random Access Memory (RAM) with MAR and MDR - demonstrates using the built-in RAM element extended with the Memory Address Register (MAR) and Memory Data Register (MDR).
  

Its not much and getting it to add and substract numbers is a pain. Just use a calculator. This is only a work of art (or architecture perhaps?).