project.name

Gauri Dhingra

Member since: 3 years

Educational Institution: Not Entered

Country: India

complete ALU

complete ALU
Public
project.name

Half Adder using Half Subtractor

Half Adder using Half Subtractor
Public
project.name

Exp-8 To simulate the logical part of a simple ALU

Exp-8 To simulate the logical part of a simple ALU
Public
project.name

LOGICAL SHIFT

LOGICAL SHIFT
Public
project.name

ALU LOGIC

ALU LOGIC
Public
project.name

Complete ALU

Complete ALU
Public
project.name

BCD

BCD
Public
project.name

Exp-6 Tri State Buffer

Exp-6 Tri State Buffer
Public
project.name

Exp5(i)

Exp5(i)
Public
project.name

4 bit bcd adder

4 bit bcd adder
Public
project.name

Exp-6: To simulate a common bus using tri-state buffer

Exp-6: To simulate a common bus using tri-state buffer
Public
project.name

Exp-7 Common bus using 4X1 MUX

Exp-7 Common bus using 4X1 MUX
Public
project.name

Arithmetic logical Unit

Arithmetic logical Unit
Public
project.name

EXP7.-COMMON BUS USING 4X1 MUX

EXP7.-COMMON BUS USING 4X1 MUX
Public
project.name

Exp-6 To simulate a common bus using tri-state buffer using demux

Exp-6 To simulate a common bus using tri-state buffer using demux
Public
project.name

Common Bus using tri state buffer

Common Bus using tri state buffer
Public
project.name

Complete ALU

Complete ALU
Public
project.name
No result image
Gauri Dhingra doesn't have any favourites.
No result image
Gauri Dhingra is not a collaborator of any project.