[CSCA] Counters and Timing Signals
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Author: Igor Rončević

Project access type: Public

Description:

Counters and timing signal generators discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • Sample 2-Bit Counter - a simple counter exploratory developed by students during the lectures.
  • Sample 2-Bit Counter with Timing Signals - that simple counter extended with decoder to provide timing signals.
  • 2-Bit Switch-Tail Ring Counter - developed by using D flip-flops.
  • 2-Bit Johnson Counter - developed by extending the 2-Bit Switch-Tail Ring Counter with decoder to provide timing signals.
  • 4-Bit Switch-Tail Ring Counter - developed by extending the 2-Bit Switch-Tail Ring Counter with two more D flip-flops. [learn more (see chapters at the bottom of the page)]
  • 4-Bit Johnson Counter - developed by extending the 4-Bit Switch-Tail Ring Counter with decoder to provide timing signals. [learn more (see chapters at the bottom of the page)]

Created: Dec 14, 2022

Updated: Jan 22, 2024


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