Latches and flip-flops as discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

• SR Latch - demonstrates the behavior of an SR Latch. [learn more]
• Clock - demonstrates the Clock Signal. [learn more]
  
• Clocked SR Latch - developed by bringing the Clock Signal to the SR Latch. [learn more]
• D Latch - demonstrates the behavior of a D Latch. [learn more]
• Clocked D Latch - developed by bringing the Clock Signal to the D Latch. [learn more]