PISO

Arithmetic logic unit

AND Gate

NOR Gate

1x8 De-multiplexers

1X4 De-Multiplexer

8X1 Multiplexer Assesment

SR and D Flip FLop using NAND

Priority Encoder

Priority Encoder

4X1 MUX

8X1 MUX

XNOR Gate

Arithmetic logic unit

4X1 Multiplexer

N -Parallel Subtractor

Half Subtractor

XOR Gate

NAND Gate

Full Subtractor

Gray to Binary

1x4 De-multiplexers

3 - Bit Parallel Adder

Binary To Gray Code

PIPO

Priority Encoder

Arithmetic logic unit

1X8 De-Multiplexer

SISO and SIPO

Full Adder

Half Adder

NOT Gate

Priority Encoder

OR Gate

4X1 MUX