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A register build with D Flip Flops designed to keep the address of the current-executed instruction. The addresses it keeps are numbers multiple of four.

Reference to ComputerOrganisationAndDesign 4:4.

This CPU is capable of executing the following instructions.

• lw
  
• sw
• bne
• add
• sub
• and
• or
• slt
• j

Implementation of the processor MIPS R2000 in it's unicycle version.