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Tags: MIPS

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A register build with D Flip Flops designed to keep the address of the current-executed instruction. The addresses it keeps are numbers multiple of four.


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32-bit ALU


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MIPS-32

Reference to ComputerOrganisationAndDesign 4:4.

This CPU is capable of executing the following instructions.

  • lw
  • sw
  • bne
  • add
  • sub
  • and
  • or
  • slt
  • j

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Implementation of the processor MIPS R2000 in it's unicycle version.