Is it possible to use or copy a subcircuit from one project for use in another? I'm looking to create a library of circuit as modules for various projects.
Is there any page where you discuss the Verilog limitations, bugs, errors, etc. in CircuitVerse or any kind of documentation on the language?
為什麼circuitverse verilog 在設計時運行都沒有問題,也可以顯示功能出來。 但是,上傳分享後,都不行運行?為什麼 我的範例如下: https://circuitverse.org/users/102221/projects/testnotdemo https://circuitverse.org/users/102221/projects/case-demo
Dear Sir My students are facing a problem of not being able to login, following error message is prompring. *500 SERVER ERRORED!, IT'S ME NOT YOU, LET'S TRY AGAIN :) Return To Homepage* Kin...
We can use decoder with bitwidth but we can't connect more than 1 wire. Usually decoders has inputs = √output. Yes we can use decoders with bitwidth but we can't connect more than 1 wire. Anybody c...
clock is not a sequential element. pls move it to Inputs
Since you support a Buffer gate with tri-state outputs (0, 1 and open), it would be useful to use a different color wire when it’s output is open. Currently it uses dark green (the same as a 0 out...
The term “Text Direction” is confusion, as it implies how the characters in the text should be facing, rather than where the label should be positioned. it would be less confusing if you used “T...
A significant improvement to the ROM and EPROM elements would be to allow loading their contents from a file. The basic idea would be to load the ROM or EPROM from an uploaded file. You could s...