Simulator
Getting Started
Learn
Documentation
Features
Teachers
Blog
About
Log in
Users
Projects
Search
Searched Projects
Tags:
Q1 = 1
0
Stars
10
Views
User:
Avinash Raj
DLD Q1
DLD Q1
Determine the state of the shift register after each clock pulse for the given RIGHT/(LEFT) ̅ control input waveform. Assume that Q0 = 1
Q1 = 1
Q2 = 0
and Q3 = 1 and that the serial data-input line is LOW.
View
