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YABEI SAP System

YABEI SAP System

Yet Another Ben Eater Inspired Simple As Possible System

I'm following along with the excellent YouTube instructional series Building an 8-bit breadboard computer! by Ben Eater.

Note that he credits the book "Digital Computer Electronics" by Albert Paul Mauvino for many of the SAP (Simple As Possible) ideas.

I'm mostly keeping it the same as his computer except:

  • I decided to have an 8-bit address space rather than 4-bits. 
  • Indirect mode instructions require another register.
  • Instructions only take as many clock cycles as they need as opposed to each instruction taking the same number of cycles and shorter instructions wasting the leftover cycles.
  • I didn't implement the hex or digital multi-segment displays... man that looked tedious!
  • I ended up having to do the microcode using combinational logic rather than EEPROM as the circuitverse EEPROM currently only supports 8 address lines and I needed at least 10
  • I added 8 bit x 8 bit multiplication. This also involves a second accumulator register which is used with the primary accumulator to house the 16 bit result.

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MW6502 address decoding

MW6502 address decoding

An enhancement to Ben Eater's 6502 address decoding logic based somewhat on @krischik STEEMIT article at https://steemit.com/hive-175254/@krischik/ben-eater-6502-kit-day-16.

This circuit adds a Dual 4 input AND chip (74LS21 per krischik) to recover unusable RAM in Ben's original design and a 3 to 8 decoder chip (74LS138) to provide additional device selects such as the additional VIA chip.

Ben Eater's amazing 6502 build series: https://eater.net/6502