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Tags: assignment

project.name
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101 detector

101 detector

project.name
0 Stars     52 Views

assignment4

assignment4

project.name
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zhangulie makritsu, D/19/EE/15

zhangulie makritsu, D/19/EE/15

project.name
0 Stars     25 Views

AND Gate

AND Gate

project.name
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OR Gate

OR Gate

project.name
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NOT Gate

NOT Gate

project.name
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Question 4

Question 4

project.name
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XOR using basic gates

XOR using basic gates

project.name
0 Stars     29 Views

XNOR using basic gates

XNOR using basic gates

project.name
0 Stars     28 Views

AND unsing NAND

AND unsing NAND

project.name
0 Stars     29 Views

OR using NAND

OR using NAND

project.name
0 Stars     27 Views

NOT using NAND

NOT using NAND

project.name
0 Stars     28 Views

AND using NOR

AND using NOR

project.name
0 Stars     24 Views

OR using NOR

OR using NOR

project.name
0 Stars     25 Views

NOT using NOR

NOT using NOR

project.name
0 Stars     27 Views

question 6

question 6

project.name
0 Stars     29 Views

question 7

question 7

project.name
0 Stars     28 Views

Half-adder

Half-adder

project.name
0 Stars     22 Views

Full-adder

Full-adder

project.name
0 Stars     28 Views

Half-Subtractor

Half-Subtractor

project.name
0 Stars     21 Views

Full-subtractor

Full-subtractor

project.name
0 Stars     22 Views

parallel adder

parallel adder

project.name
0 Stars     25 Views

MAGNITUDE COMPARATOR

MAGNITUDE COMPARATOR

project.name
0 Stars     22 Views

BCD to excess 3 code converter

BCD to excess 3 code converter

project.name
0 Stars     26 Views

3 to 8 line decoder

3 to 8 line decoder

project.name
0 Stars     20 Views

8 to 3 line encoder

8 to 3 line encoder

project.name
0 Stars     32 Views

Full adder using decoder and two OR gates

Full adder using decoder and two OR gates

project.name
0 Stars     23 Views

Full subtractor using decoder

Full subtractor using decoder

project.name
0 Stars     22 Views

4 TO 1 MUX OF F

4 TO 1 MUX OF F

project.name
0 Stars     37 Views

32 x 4 ROM

32 x 4 ROM

project.name
0 Stars     23 Views

PLA with 3 inputs

PLA with 3 inputs

project.name
0 Stars     23 Views

PAL

PAL

project.name
0 Stars     23 Views

4 TO 1 MUX

4 TO 1 MUX

project.name
0 Stars     81 Views

combinational circuit using ROM that accepts 2 bit number and generates output binary number equal to the square of the input number

combinational circuit using ROM that accepts 2 bit number and generates output binary number equal to the square of the input number

project.name
0 Stars     24 Views

SR latch using nand gates

SR latch using nand gates

project.name
0 Stars     103 Views

SR latch using NOR gates

SR latch using NOR gates

project.name
0 Stars     23 Views

D Flip Flop

D Flip Flop

project.name
0 Stars     18 Views

J K Flipflop

J K Flipflop

project.name
0 Stars     21 Views

J K Flipflop using AND and NOR

J K Flipflop using AND and NOR

project.name
0 Stars     28 Views

T flip flop using nand

T flip flop using nand

project.name
0 Stars     38 Views

SR latch with control input using NAND gates

SR latch with control input using NAND gates

project.name
0 Stars     21 Views

JK master slave flip flop

JK master slave flip flop

project.name
0 Stars     21 Views

jk circuit excitation

jk circuit excitation

project.name
0 Stars     23 Views

RS excitation circuit

RS excitation circuit

project.name
0 Stars     20 Views

JK excitation circuit

JK excitation circuit

project.name
0 Stars     19 Views

D excitation circuit

D excitation circuit

project.name
0 Stars     24 Views

T excitation circuit

T excitation circuit

project.name
0 Stars     24 Views
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assignment_3

assignment_3

project.name
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assignment 2

assignment 2

f=abc'+a'bc+abc'+abc+a'bc'


project.name
0 Stars     21 Views

HPC0_Assignment2

HPC0_Assignment2

Implementierung verschiedener Addierer


project.name
0 Stars     19 Views

HPC0_Assignment4

HPC0_Assignment4